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MC9S08RG60 Datasheet, PDF (83/232 Pages) Motorola, Inc – Microcontrollers | |||
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SoC Guide â MC9S08RG60/D Rev 1.10
Memory and addressing
M = A memory location or absolute data, depending on addressing mode
M:M + $0001= A 16-bit value in two consecutive memory locations. The higher-order (most
signiï¬cant) 8 bits are located at the address of M, and the lower-order (least
signiï¬cant) 8 bits are located at the next higher sequential address.
Condition code register (CCR) bits
V = Twoâs complement overï¬ow indicator, bit 7
H = Half carry, bit 4
I = Interrupt mask, bit 3
N = Negative indicator, bit 2
Z = Zero indicator, bit 1
C = Carry/borrow, bit 0 (carry out of bit 7)
CCR activity notation
â = Bit not affected
0 = Bit forced to 0
1 = Bit forced to 1
= Bit set or cleared according to results of operation
U = Undeï¬ned after the operation
Machine coding notation
dd = Low-order 8 bits of a direct address $0000â$00FF (high byte assumed to be
$00)
ee = Upper 8 bits of 16-bit offset
ff = Lower 8 bits of 16-bit offset or 8-bit offset
ii = One byte of immediate data
jj = High-order byte of a 16-bit immediate data value
kk = Low-order byte of a 16-bit immediate data value
hh = High-order byte of 16-bit extended address
ll = Low-order byte of 16-bit extended address
rr = Relative offset
Freescale Semiconductor
MC9S08RC/RD/RE/RG
83
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