MC9S08RG60 Datasheet, PDF (51/232 Pages) Motorola, Inc – Microcontrollers

SoC Guide — MC9S08RG60/D Rev 1.10
Table 4-6 FLASH Clock Divider Settings
f_Bus
8 MHz
4 MHz
2 MHz
1 MHz
200 kHz
150 kHz
PRDIV8
(Binary)
0
0
0
0
0
0
DIV5:DIV0
(Decimal)
39
19
9
4
0
0
f_FCLK
200 kHz
200 kHz
200 kHz
200 kHz
200 kHz
150 kHz
Program/Erase Timing Pulse
(5 µs Min, 6.7 µs Max)
5 µs
5 µs
5 µs
5 µs
5 µs
6.7 µs
4.6.2 FLASH Options Register (FOPT and NVOPT)
During reset, the contents of the nonvolatile location NVOPT are copied from FLASH into FOPT. Bits 5
through 2 are not used and always read 0. This register may be read at any time, but writes have no meaning
or effect. To change the value in this register, erase and reprogram the NVOPT location in FLASH
memory as usual and then issue a new MCU reset.
Bit 7
6
5
4
3
2
1
Read: KEYEN FNORED
0
0
0
0
SEC01
Write:
Reset:
This register is loaded from nonvolatile location NVOPT during reset.
= Unimplemented or Reserved
Figure 4-5 FLASH Options Register (FOPT)
Bit 0
SEC00
KEYEN — Backdoor Key Mechanism Enable
When this bit is 0, the backdoor key mechanism cannot be used to disengage security. The backdoor
key mechanism is accessible only from user (secured) firmware. BDM commands cannot be used to
write key comparison values that would unlock the backdoor key. For more detailed information about
the backdoor key mechanism, refer to 4.5 Security.
1 = If user firmware writes an 8-byte value that matches the nonvolatile backdoor key
(NVBACKKEY through NVBACKKEY+7 in that order), security is temporarily disengaged
until the next MCU reset.
0 = No backdoor key access allowed.
FNORED — Vector Redirection Disable
When this bit is 1, then vector redirection is disabled.
1 = Vector redirection disabled.
0 = Vector redirection enabled.
Freescale Semiconductor
MC9S08RC/RD/RE/RG
51