MC9S08RG60 Datasheet, PDF (160/232 Pages) Motorola, Inc – Microcontrollers

Serial Communications Interface (SCI) Module
NEIE — Noise Error Interrupt Enable
This bit enables the noise flag (NF) to generate hardware interrupt requests.
1 = Hardware interrupt requested when NF = 1.
0 = NF interrupts disabled (use polling).
FEIE — Framing Error Interrupt Enable
This bit enables the framing error flag (FE) to generate hardware interrupt requests.
1 = Hardware interrupt requested when FE = 1.
0 = FE interrupts disabled (use polling).
PEIE — Parity Error Interrupt Enable
This bit enables the parity error flag (PF) to generate hardware interrupt requests.
1 = Hardware interrupt requested when PF = 1.
0 = PF interrupts disabled (use polling).
11.9.7 SCI Data Register (SCI1D)
This register is actually two separate registers. Reads return the contents of the read-only receive data
buffer and writes go to the write-only transmit data buffer. Reads and writes of this register are also
involved in the automatic flag clearing mechanisms for the SCI status flags.
Bit 7
6
5
4
3
2
Read: R7
R6
R5
R4
R3
R2
Write: T7
T6
T5
T4
T3
T2
Reset: 0
0
0
0
0
0
Figure 11-12 SCI Data Register (SCI1D)
1
Bit 0
R1
R0
T1
T0
0
0
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MC9S08RC/RD/RE/RG
Freescale Semiconductor