MC9S08RG60 Datasheet, PDF (156/232 Pages) Motorola, Inc – Microcontrollers

Serial Communications Interface (SCI) Module
When TE is written to 0, the transmitter keeps control of the port TxD1 pin until any data, queued idle,
or queued break character finishes transmitting before allowing the pin to revert to a general-purpose
I/O pin.
RE — Receiver Enable
When the SCI receiver is off, the RxD1 pin reverts to being a general-purpose port I/O pin.
1 = Receiver on.
0 = Receiver off.
RWU — Receiver Wakeup Control
This bit can be written to 1 to place the SCI receiver in a standby state where it waits for automatic
hardware detection of a selected wakeup condition. The wakeup condition is either an idle line between
messages (WAKE = 0, idle-line wakeup), or a logic 1 in the most significant data bit in a character
(WAKE = 1, address-mark wakeup). Application software sets RWU and (normally) a selected
hardware condition automatically clears RWU. Refer to 11.5.3 Receiver Wakeup Operation for more
details.
1 = SCI receiver in standby waiting for wakeup condition.
0 = Normal SCI receiver operation.
SBK — Send Break
Writing a 1 and then a 0 to SBK queues a break character in the transmit data stream. Additional break
characters of 10 or 11 bit times of logic 0 are queued as long as SBK = 1. Depending on the timing of
the set and clear of SBK relative to the information currently being transmitted, a second break
character may be queued before software clears SBK. Refer to 11.4.2 Send Break and Queued Idle for
more details.
1 = Queue break character(s) to be sent.
0 = Normal transmitter operation.
11.9.4 SCI Status Register 1 (SCI1S1)
This register has eight read-only status flags. Writes have no effect. Special software sequences (that do
not involve writing to this register) are used to clear these status flags.
Bit 7
6
5
4
3
2
1
Bit 0
Read: TDRE
TC
RDRF IDLE
OR
NF
FE
PF
Write:
Reset: 1
1
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 11-9 SCI Status Register 1 (SCI1S1)
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MC9S08RC/RD/RE/RG
Freescale Semiconductor