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MC9S08RG60 Datasheet, PDF (211/232 Pages) Motorola, Inc – Microcontrollers
SoC Guide — MC9S08RG60/D Rev 1.10
NOTES:
1. RAM will retain data down to POR voltage. RAM data not guaranteed to be valid following a POR.
2. This parameter is characterized and not tested on each device.
3. If SAFE bit is set, VDD must be above re-arm voltage to allow MCU to accept interrupts, refer to 5.6 Low-Voltage Detect
(LVD) System.
4. Measurement condition for pull resistors: VIn = VSS for pullup and VIn = VDD for pulldown.
5. The PTA0 pullup resistor may not pull up to the specified minimum VIH. However, all ports are functionally tested to
guarantee that a logic 1 will be read on any port input when the pullup is enabled and no dc load is present on the pin. In
addition, the test checks that the pin is pulled up from VSS to a logic 1 within 20 µs with a nominal capacitance of 75 pF.
6. All functional non-supply pins are internally clamped to VSS and VDD.
7. Input must be current limited to the value specified. To determine the value of the required current-limiting resistor,
calculate resistance values for positive and negative clamp voltages, then use the larger of the two values.
8. Power supply must maintain regulation within operating VDD range during instantaneous and operating maximum current
conditions. If positive injection current (VIn > VDD) is greater than IDD, the injection current may flow out of VDD and could
result in external power supply going out of regulation. Ensure external VDD load will shunt current greater than maximum
injection current. This will be the greatest risk when the MCU is not consuming power. Examples are: if no system clock
is present, or if clock rate is very low (which would reduce overall power consumption).
9. PTA0 does not have a clamp diode to VDD. Do not drive PTA0 above VDD.
40
PULLUP RESISTOR TYPICALS
85°C
40
25°C
PULLDOWN RESISTOR TYPICALS
85°C
–40°C
25°C
35
–40°C
35
30
30
25
25
20
1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6
VDD (V)
20
1.8
2.3
2.8
VDD (V)
3.3 3.6
Figure C-1 Pullup and Pulldown Typical Resistor Values (VDD = 3.0 V)
1
0.8
0.6
0.4
0.2
0
0
85°C
25°C
–40°C
TYPICAL VOL VS IOL AT VDD = 3.0 V
10
20
IOL (mA)
0.4
0.3
0.2
0.1
0
30
1
85°C
25°C
–40°C
TYPICAL VOL VS VDD
IOL = 6 mA
IOL = 3 mA
2
3
VDD (V)
IOL = 10 mA
4
Figure C-2 Typical Low-Side Driver (Sink) Characteristics (Port B and IRO)
Freescale Semiconductor
MC9S08RC/RD/RE/RG
211