MC9S08RG60 Datasheet, PDF (177/232 Pages) Motorola, Inc – Microcontrollers

SoC Guide — MC9S08RG60/D Rev 1.10
Chapter 13 Analog Comparator (ACMP) Module
The 32- and 44-pin LQFP packages of the MC9S08RCxx, MC9S08RExx, and MC9S08RGxx devices
include an analog comparator. This comparator has two inputs or can optionally use an internal bandgap
reference. The comparator inputs are shared with PTD4 and PTD5 port I/O pins.
HCS08 CORE
CPU
INT
BDC
BKP
INTERNAL BUS
DEBUG
MODULE (DBG)
7
PTA7/KBI1P7–
PTA1/KBI1P1
PTA0/KBI1P0
NOTES1, 2
HCS08 SYSTEM CONTROL
RESETS AND INTERRUPTS
MODES OF OPERATION
POWER MANAGEMENT
RTI
COP
IRQ
LVD
USER FLASH
(RC/RD/RE/RG60 = 63,364 BYTES)
(RC/RD/RE/RG32 = 32,768 BYTES)
(RC/RD/RE16 = 16,384 BYTES)
(RC/RD/RE8 = 8192 BYTES)
8-BIT KEYBOARD
INTERRUPT MODULE (KBI1)
4-BIT KEYBOARD
INTERRUPT MODULE (KBI2)
SERIAL COMMUNICATIONS
INTERFACE MODULE (SCI1)
ANALOG COMPARATOR
MODULE (ACMP1)
PTB7/TPM1CH1
PTE6
PTB5
PTB4
PTB3
PTB2
PTB1/RxD1
PTB0/TxD1
NOTES 1, 5
PTC7/SS1
PTC6/SPSCK1
PTC5/MISO1
PTC4/MOSI1
PTC3/KBI2P3
PTC2/KBI2P2
PTC1/KBI2P1
PTC0/KBI2P0
NOTE 1
USER RAM
(RC/RD/RE/RG32/60 = 2048 BYTES)
(RC/RD/RE8/16 = 1024 BYTES)
EXTAL
XTAL
LOW-POWER OSCILLATOR
2-CHANNEL TIMER/PWM
MODULE (TPM1)
SERIAL PERIPHERAL
INTERFACE MODULE (SPI1)
PTD6/TPM1CH0
PTD5/ACMP1+
PTD4/ACMP1–
PTD3
PTD2/IRQ
PTD1/RESET
PTD0/BKGD/MS
NOTES
1, 3, 4
V_DD
VOLTAGE
V_SS
REGULATOR
CARRIER MODULATOR
TIMER MODULE (CMT)
8
PTE7–PTE0 NOTE 1
IRO NOTE 5
NOTES:
1. Port pins are software configurable with pullup device if input port
2. PTA0 does not have a clamp diode to V_DD. PTA0 should not be driven above V_DD.
3. IRQ pin contains software configurable pullup/pulldown device if IRQ enabled (IRQPE = 1)
4. The RESET pin contains integrated pullup device enabled if reset enabled (RSTPE = 1)
5. High current drive
6. Pins PTA[7:0] contain both pullup and pulldown devices. Pulldown available when KBI enabled (KBIPn = 1).
Figure 13-1 MC9S08RC/RD/RE/RG Block Diagram Highlighting ACMP Block and Pins
Freescale Semiconductor
MC9S08RC/RD/RE/RG
177