MC9S08RG60 Datasheet, PDF (25/232 Pages) Motorola, Inc – Microcontrollers

SoC Guide — MC9S08RG60/D Rev 1.10
Table 2-1 Pin Sharing References
Port Pins
Alternate
Function
Reference⁽¹⁾
PTA7–PTA0
KBI1P7–KBI1P0 Keyboard Interrupt (KBI) Module
PTB7
TPM1CH1
Timer/PWM Module (TPM) Module
PTB6–PTB2
—
Parallel Input/Output
PTB1
PTB0
RxD1
TxD1
Serial Communications Interface (SCI) Module
PTC7
PTC6
PTC5
PTC4
SS1
SPSCK1
MISO1
MOSI1
Serial Peripheral Interface (SPI) Module
PTC3–PTC0 KBI2P3–KBI2P0 Keyboard Interrupt (KBI) Module
PTD6
TPM1CH0
Timer/PWM Module (TPM) Module
PTD5
PTD4
ACMP1+
ACMP1–
Analog Comparator (ACMP) Module
PTD2
IRQ
PTD1
RESET
Resets, Interrupts, and System Configuration
PTD0
BKGD/MS
PTE7–PTE0
—
Parallel Input/Output
NOTES:
1. See this section for information about modules that share these pins.
When an on-chip peripheral system is controlling a pin, data direction control bits still determine what is
read from port data registers even though the peripheral module controls the pin direction by controlling
the enable for the pin’s output buffer. See the Parallel Input/Output section for more details.
Pullup enable bits for each input pin control whether on-chip pullup devices are enabled whenever the pin
is acting as an input even if it is being controlled by an on-chip peripheral module. When the PTA7–PTA4
pins are controlled by the KBI module and are configured for rising-edge/high-level sensitivity, the pullup
enable control bits enable pulldown devices rather than pullup devices. Similarly, when PTD2 is
configured as the IRQ input and is set to detect rising edges, the pullup enable control bit enables a
pulldown device rather than a pullup device.
Freescale Semiconductor
MC9S08RC/RD/RE/RG
25