PIC18F258 Datasheet, PDF (88/384 Pages) Microchip Technology – High Performance, 28/40-Pin Enhanced FLASH Microcontrollers with CAN

PIC18FXX8
REGISTER 8-8:
PERIPHERAL INTERRUPT ENABLE REGISTER 2 (PIE2)
U-0
R/W-0
U-0
—
CMIE⁽¹⁾
—
bit 7
R/W-0
EEIE
R/W-0
BCLIE
R/W-0
LVDIE
R/W-0
TMR3IE
R/W-0
ECCP1IE⁽¹⁾
bit 0
bit 7
Unimplemented: Read as '0'
bit 6
CMIE: Comparator Interrupt Enable bit⁽¹⁾
1 = Enables the comparator interrupt
0 = Disables the comparator interrupt
bit 5
Unimplemented: Read as '0'
bit 4
EEIE: EEPROM Write Interrupt Enable bit
1 = Enabled
0 = Disabled
bit 3
BCLIE: Bus Collision Interrupt Enable bit
1 = Enabled
0 = Disabled
bit 2
LVDIE: Low Voltage Detect Interrupt Enable bit
1 = Enabled
0 = Disabled
bit 1
TMR3IE: TMR3 Overflow Interrupt Enable bit
1 = Enables the TMR3 overflow interrupt
0 = Disables the TMR3 overflow interrupt
bit 0
ECCP1IE: ECCP1 Interrupt Enable bit ⁽¹⁾
1 = Enables the ECCP1 interrupt
0 = Disables the ECCP1 interrupt
Note 1: This bit is only available on PIC18F4X8 devices. For PIC18F2X8 devices, this bit
is unimplemented and reads as ’0’.
Legend:
R = Readable bit
- n = Value at POR
W = Writable bit
’1’ = Bit is set
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared x = Bit is unknown
DS41159B-page 86
Preliminary
 2002 Microchip Technology Inc.