PIC18F258 Datasheet, PDF (339/384 Pages) Microchip Technology – High Performance, 28/40-Pin Enhanced FLASH Microcontrollers with CAN

27.3.3 TIMING DIAGRAMS AND SPECIFICATIONS
FIGURE 27-5:
EXTERNAL CLOCK TIMING
Q4
Q1
Q2
Q3
OSC1
CLKO
1
3
3
2
PIC18FXX8
Q4
Q1
4
4
TABLE 27-6: EXTERNAL CLOCK TIMING REQUIREMENTS
Param No. Symbol
Characteristic
Min
Max Units
Conditions
1A
FOSC External CLKI Frequency⁽¹⁾
DC
4
MHz XT osc
DC
25
MHz HS osc
4
10
MHz HS + PLL osc
Oscillator Frequency⁽¹⁾
DC
200
kHz LP osc
DC
40
MHz EC
DC
4
MHz RC osc
0.1
4
MHz XT osc
4
25
MHz HS osc
4
10
MHz HS + PLL osc
5
200
kHz LP osc
1
TOSC External CLKI Period⁽¹⁾
250
—
ns XT and RC osc
40
—
ns HS osc
100
—
ns HS + PLL osc
Oscillator Period⁽¹⁾
5
—
µs LP osc
5
—
ns EC
250
—
ns RC osc
250
10,000 ns XT osc
100
10,000 ns HS osc
40
100
ns HS + PLL osc
5
—
µs LP osc
2
TCY
Instruction Cycle Time⁽¹⁾
100
—
ns TCY = 4/FOSC
3
TosL, External Clock in (OSC1)
30
—
ns XT osc
TosH High or Low Time
2.5
—
ns LP osc
10
—
µs HS osc
4
TosR, External Clock in (OSC1)
—
20
ns XT osc
TosF Rise or Fall Time
—
50
ns LP osc
—
7.5
ns HS osc
Note 1: Instruction cycle period (TCY) equals four times the input oscillator time-base period. All specified values are
based on characterization data for that particular oscillator type under standard operating conditions with
the device executing code. Exceeding these specified limits may result in an unstable oscillator operation
and/or higher than expected current consumption. All devices are tested to operate at "Min." values with an
external clock applied to the OSC1/CLKI pin. When an external clock input is used, the "Max." cycle time
limit is "DC" (no clock) for all devices.
 2002 Microchip Technology Inc.
Preliminary
DS41159B-page 337