PIC18F258 Datasheet, PDF (280/384 Pages) Microchip Technology – High Performance, 28/40-Pin Enhanced FLASH Microcontrollers with CAN

PIC18FXX8
TABLE 25-1: OPCODE FIELD DESCRIPTIONS
Field
a
bbb
BSR
d
dest
f
fs
fd
k
label
mm
*
*+
*-
+*
n
PRODH
PRODL
s
u
WREG
x
TBLPTR
TABLAT
TOS
PC
PCL
PCH
PCLATH
PCLATU
GIE
WDT
TO
PD
C, DC, Z, OV, N
[]
()
→
<>
∈
italics
Description
RAM access bit
a = 0: RAM location in Access RAM (BSR register is ignored)
a = 1: RAM bank is specified by BSR register
Bit address within an 8-bit file register (0 to 7)
Bank Select Register. Used to select the current RAM bank.
Destination select bit;
d = 0: store result in WREG,
d = 1: store result in file register f.
Destination either the WREG register or the specified register file location
8-bit Register file address (0x00 to 0xFF)
12-bit Register file address (0x000 to 0xFFF). This is the source address.
12-bit Register file address (0x000 to 0xFFF). This is the destination address.
Literal field, constant data or label (may be either an 8-bit, 12-bit or a 20-bit value)
Label name
The mode of the TBLPTR register for the Table Read and Table Write instructions.
Only used with Table Read and Table Write instructions:
No change to register (such as TBLPTR with Table Reads and Writes)
Post-Increment register (such as TBLPTR with Table Reads and Writes)
Post-Decrement register (such as TBLPTR with Table Reads and Writes)
Pre-Increment register (such as TBLPTR with Table Reads and Writes)
The relative address (2’s complement number) for relative branch instructions, or the direct address for
Call/Branch and Return instructions
Product of Multiply high byte
Product of Multiply low byte
Fast Call/Return mode select bit;
s = 0: do not update into/from shadow registers
s = 1: certain registers loaded into/from shadow registers (Fast mode)
Unused or Unchanged
Working register (accumulator)
Don't care (0 or 1).
The assembler will generate code with x = 0. It is the recommended form of use for compatibility with all
Microchip software tools.
21-bit Table Pointer (points to a Program Memory location)
8-bit Table Latch
Top-of-Stack
Program Counter
Program Counter Low Byte
Program Counter High Byte
Program Counter High Byte Latch
Program Counter Upper Byte Latch
Global Interrupt Enable bit
Watchdog Timer
Time-out bit
Power-down bit
ALU status bits Carry, Digit Carry, Zero, Overflow, Negative
Optional
Contents
Assigned to
Register bit field
In the set of
User defined term (font is courier)
DS41159B-page 278
 2002 Microchip Technology Inc.