PIC18F258 Datasheet, PDF (213/384 Pages) Microchip Technology – High Performance, 28/40-Pin Enhanced FLASH Microcontrollers with CAN

PIC18FXX8
REGISTER 19-18: RXBnDLC – RECEIVE BUFFER n DATA LENGTH CODE REGISTERS
U-0
—
bit 7
R/W-x
RXRTR
R/W-x
RB1
R/W-x
RB0
R/W-x
DLC3
R/W-x
DLC2
R/W-x
DLC1
R/W-x
DLC0
bit 0
bit 7
bit 6
bit 5
bit 4
bit 3-0
Unimplemented: Read as ’0’
RXRTR: Receiver Remote Transmission Request bit
1 = Remote transfer request
0 = No remote transfer request
RB1: Reserved bit 1
Reserved by CAN Spec and read as ’0’
RB0: Reserved bit 0
Reserved by CAN Spec and read as ’0’
DLC3:DLC0: Data Length Code bits
1111 = Invalid
1110 = Invalid
1101 = Invalid
1100 = Invalid
1011 = Invalid
1010 = Invalid
1001 = Invalid
1000 = Data Length = 8 bytes
0111 = Data Length = 7 bytes
0110 = Data Length = 6 bytes
0101 = Data Length = 5 bytes
0100 = Data Length = 4 bytes
0011 = Data Length = 3 bytes
0010 = Data Length = 2 bytes
0001 = Data Length = 1 bytes
0000 = Data Length = 0 bytes
Legend:
R = Readable bit
- n = Value at POR
W = Writable bit
’1’ = Bit is set
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared x = Bit is unknown
REGISTER 19-19: RXBnDm – RECEIVE BUFFER n DATA FIELD BYTE m REGISTERS
R/W-x R/W-x R/W-x R/W-x R/W-x R/W-x R/W-x R/W-x
RXBnDm7 RXBnDm6 RXBnDm5 RXBnDm4 RXBnDm3 RXBnDm2 RXBnDm1 RXBnDm0
bit 7
bit 0
bit 7-0
RXBnDm7:RXBnDm0: Receive Buffer n Data Field Byte m bits (where 0≤n<1 and 0<m<7)
Each Receive Buffer has an array of registers. For example, Receive buffer 0 has 8 registers:
RXB0D0 to RXB0D7.
Legend:
R = Readable bit
- n = Value at POR
W = Writable bit
’1’ = Bit is set
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared x = Bit is unknown
 2002 Microchip Technology Inc.
Preliminary
DS41159B-page 211