PIC18F258 Datasheet, PDF (197/384 Pages) Microchip Technology – High Performance, 28/40-Pin Enhanced FLASH Microcontrollers with CAN

PIC18FXX8
TABLE 18-10: REGISTERS ASSOCIATED WITH SYNCHRONOUS SLAVE TRANSMISSION
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
Value on
all other
RESETS
INTCON GIE/GIEH PEIE/GIEL TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF 0000 000x 0000 000u
PIR1
PSPIF
ADIF
RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000
PIE1
PSPIE
ADIE
RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000
IPR1
PSPIP
ADIP
RCIP TXIP SSPIP CCP1IP TMR2IP TMR1IP 0000 0000 0000 0000
RCSTA
SPEN
RX9
SREN CREN ADDEN FERR OERR RX9D 0000 000x 0000 000x
TXREG USART Transmit Register
0000 0000 0000 0000
TXSTA
CSRC
TX9
TXEN SYNC
—
BRGH TRMT TX9D 0000 -010 0000 -010
SPBRG Baud Rate Generator Register
0000 0000 0000 0000
Legend: x = unknown, - = unimplemented, read as '0'. Shaded cells are not used for Synchronous Slave Transmission.
TABLE 18-11: REGISTERS ASSOCIATED WITH SYNCHRONOUS SLAVE RECEPTION
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR,
BOR
Value on all
other
RESETS
INTCON GIE/GIEH PEIE/GIEL TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF 0000 000x 0000 000u
PIR1
PSPIF
ADIF
RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000
PIE1
PSPIE
ADIE
RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000
IPR1
PSPIP
ADIP
RCIP TXIP SSPIP CCP1IP TMR2IP TMR1IP 0000 0000 0000 0000
RCSTA
SPEN
RX9
SREN CREN ADDEN FERR OERR RX9D 0000 000x 0000 000x
RCREG USART Receive Register
0000 0000 0000 0000
TXSTA
CSRC
TX9
TXEN SYNC
—
BRGH TRMT TX9D 0000 -010 0000 -010
SPBRG Baud Rate Generator Register
0000 0000 0000 0000
Legend: x = unknown, - = unimplemented, read as '0'. Shaded cells are not used for Synchronous Slave Reception.
 2002 Microchip Technology Inc.
Preliminary
DS41159B-page 195