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PIC18F258 Datasheet, PDF (131/384 Pages) Microchip Technology – High Performance, 28/40-Pin Enhanced FLASH Microcontrollers with CAN
PIC18FXX8
16.0 ENHANCED CAPTURE/
COMPARE/PWM (ECCP)
MODULE
Note:
The ECCP (Enhanced Capture/Compare/
PWM) module is only available on
PIC18F448 and PIC18F458 devices.
This module contains a 16-bit register which can oper-
ate as a 16-bit Capture register, a 16-bit Compare
register, or a PWM Master/Slave Duty Cycle register.
The operation of the ECCP module differs from the
CCP (discussed in detail in Section 15.0) with the addi-
tion of an enhanced PWM module, which allows for up
to 4 output channels and user selectable polarity.
These features are discussed in detail in Section 16.5.
The module can also be programmed for automatic
shutdown in response to various analog or digital
events.
The control register for ECCP1 is shown in
Register 16-1.
REGISTER 16-1: ECCP1CON REGISTER
R/W-0
R/W-0 R/W-0
EPWM1M1 EPWM1M0 EDC1B1
bit 7
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
EDC1B0 ECCP1M3 ECCP1M2 ECCP1M1 ECCP1M0
bit 0
bit 7-6
bit 5-4
bit 3-0
EPWM1M<1:0>: PWM Output Configuration bits
If ECCP1M<3:2> = 00, 01, 10:
xx = P1A assigned as Capture/Compare input; P1B, P1C, P1D assigned as port pins
If ECCP1M<3:2> = 11:
00 = Single output; P1A modulated; P1B, P1C, P1D assigned as port pins
01 = Full-bridge output forward; P1D modulated; P1A active; P1B, P1C inactive
10 = Half-bridge output; P1A, P1B modulated with deadband control; P1C, P1D assigned as
port pins
11 = Full-bridge output reverse; P1B modulated; P1C active; P1A, P1D inactive
EDC1B<1:0>: PWM Duty Cycle Least Significant bits
Capture mode:
Unused
Compare mode:
Unused
PWM mode:
These bits are the two LSbs of the PWM duty cycle. The eight MSbs are found in ECCPR1L.
ECCP1M<3:0>: ECCP1 Mode Select bits
0000 = Capture/Compare/PWM off (resets ECCP module)
0001 = Unused (reserved)
0010 = Compare mode, toggle output on match (ECCP1IF bit is set)
0011 = Unused (reserved)
0100 = Capture mode, every falling edge
0101 = Capture mode, every rising edge
0110 = Capture mode, every 4th rising edge
0111 = Capture mode, every 16th rising edge
1000 = Compare mode, set output on match (ECCP1IF bit is set)
1001 = Compare mode, clear output on match (ECCP1IF bit is set)
1010 = Compare mode, ECCP1 pin is unaffected (ECCP1IF bit is set)
1011 = Compare mode, trigger special event (ECCP1IF bit is set; ECCP resets TMR1or TMR3,
and starts an A/D conversion, if the A/D module is enabled)
1100 = PWM mode; P1A, P1C active high; P1B, P1D active high
1101 = PWM mode; P1A, P1C active high; P1B, P1D active low
1110 = PWM mode; P1A, P1C active low; P1B, P1D active high
1111 = PWM mode; P1A, P1C active low; P1B, P1D active low
Legend:
R = Readable bit
- n = Value at POR
W = Writable bit
’1’ = Bit is set
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared x = Bit is unknown
 2002 Microchip Technology Inc.
Preliminary
DS41159B-page 129