PIC18F258 Datasheet, PDF (44/384 Pages) Microchip Technology – High Performance, 28/40-Pin Enhanced FLASH Microcontrollers with CAN

PIC18FXX8
EXAMPLE 4-2: INSTRUCTION PIPELINE FLOW
TCY0
1. MOVLW 55h
Fetch 1
2. MOVWF PORTB
3. BRA SUB_1
4. BSF PORTA, BIT3 (Forced NOP)
5. Instruction @ address SUB_1
TCY1
Execute 1
Fetch 2
TCY2
Execute 2
Fetch 3
TCY3
TCY4
TCY5
Execute 3
Fetch 4
Flush
Fetch SUB_1
Execute SUB_1
Note: All instructions are single cycle, except for any program branches. These take two cycles, since the fetch instruction
is “flushed” from the pipeline while the new instruction is being fetched and then executed.
EXAMPLE 4-3: INSTRUCTIONS IN PROGRAM MEMORY
Instruction
—
MOVLW 055h
GOTO 000006h
MOVFF 123h, 456h
—
Opcode
0E55h
EF03h, F000h
C123h, F456h
Memory
55h
0Eh
03h
EFh
00h
F0h
23h
C1h
56h
F4h
Address
000007h
000008h
000009h
00000Ah
00000Bh
00000Ch
00000Dh
00000Eh
00000Fh
000010h
000011h
000012h
DS41159B-page 42
Preliminary
 2002 Microchip Technology Inc.