PIC18F258 Datasheet, PDF (77/384 Pages) Microchip Technology – High Performance, 28/40-Pin Enhanced FLASH Microcontrollers with CAN

7.0 8 X 8 HARDWARE MULTIPLIER
7.1 Introduction
An 8 x 8 hardware multiplier is included in the ALU of
the PIC18FXX8 devices. By making the multiply a
hardware operation, it completes in a single instruction
cycle. This is an unsigned multiply that gives a 16-bit
result. The result is stored into the 16-bit product regis-
ter pair (PRODH:PRODL). The multiplier does not
affect any flags in the ALUSTA register.
Making the 8 x 8 multiplier execute in a single cycle
gives the following advantages:
• Higher computational throughput
• Reduces code size requirements for multiply
algorithms
The performance increase allows the device to be used
in applications previously reserved for Digital Signal
Processors.
Table 7-1 shows a performance comparison between
enhanced devices using the single cycle hardware mul-
tiply, and performing the same function without the
hardware multiply.
PIC18FXX8
7.2 Operation
Example 7-1 shows the sequence to do an 8 x 8
unsigned multiply. Only one instruction is required
when one argument of the multiply is already loaded in
the WREG register.
Example 7-2 shows the sequence to do an 8 x 8 signed
multiply. To account for the sign bits of the arguments,
each argument’s Most Significant bit (MSb) is tested
and the appropriate subtractions are done.
EXAMPLE 7-1:
8 x 8 UNSIGNED
MULTIPLY ROUTINE
MOVF
MULWF
ARG1, W
ARG2
;
; ARG1 * ARG2 ->
; PRODH:PRODL
EXAMPLE 7-2:
8 x 8 SIGNED MULTIPLY
ROUTINE
MOVF
MULWF
BTFSC
SUBWF
MOVF
BTFSC
SUBWF
ARG1, W
ARG2
ARG2, SB
PRODH
ARG2, W
ARG1, SB
PRODH
; ARG1 * ARG2 ->
; PRODH:PRODL
; Test Sign Bit
; PRODH = PRODH
;
- ARG1
; Test Sign Bit
; PRODH = PRODH
;
- ARG2
TABLE 7-1: PERFORMANCE COMPARISON
Routine
Multiply Method
8 x 8 unsigned
8 x 8 signed
16 x 16 unsigned
16 x 16 signed
Without hardware multiply
Hardware multiply
Without hardware multiply
Hardware multiply
Without hardware multiply
Hardware multiply
Without hardware multiply
Hardware multiply
Program
Memory
(Words)
13
1
33
6
21
24
52
36
Cycles
(Max)
69
1
91
6
242
24
254
36
Time
@ 40 MHz @ 10 MHz @ 4 MHz
6.9 µs
100 ns
9.1 µs
600 ns
24.2 µs
2.4 µs
25.4 µs
3.6 µs
27.6 µs
400 ns
36.4 µs
2.4 µs
96.8 µs
9.6 µs
102.6 µs
14.4 µs
69 µs
1 µs
91 µs
6 µs
242 µs
24 µs
254 µs
36 µs
 2002 Microchip Technology Inc.
DS41159B-page 75