PIC18F258 Datasheet, PDF (307/384 Pages) Microchip Technology – High Performance, 28/40-Pin Enhanced FLASH Microcontrollers with CAN

PIC18FXX8
NEGF
Negate f
Syntax:
Operands:
Operation:
Status Affected:
[ label ] NEGF f [,a]
0 ≤ f ≤ 255
a ∈ [0,1]
(f)+1→f
N, OV, C, DC, Z
Encoding:
0110 110a ffff ffff
Description:
Location ‘f’ is negated using two’s
complement. The result is placed in
the data memory location 'f'. If ’a’ is
0, the Access Bank will be
selected, overriding the BSR value.
If ’a’ = 1, then the bank will be
selected as per the BSR value.
Words:
1
Cycles:
1
Q Cycle Activity:
Q1
Q2
Q3
Q4
Decode
Read
register ’f’
Process
Data
Write
register ’f’
Example:
NEGF REG, 1
Before Instruction
REG = 0011 1010 [0x3A]
After Instruction
REG = 1100 0110 [0xC6]
NOP
No Operation
Syntax:
Operands:
Operation:
Status Affected:
[ label ] NOP
None
No operation
None
Encoding:
0000 0000 0000 0000
1111 xxxx xxxx xxxx
Description:
No operation.
Words:
1
Cycles:
1
Q Cycle Activity:
Q1
Q2
Q3
Q4
Decode
No
operation
No
operation
No
operation
Example:
None.
 2002 Microchip Technology Inc.
DS41159B-page 305