PIC18F258 Datasheet, PDF (378/384 Pages) Microchip Technology – High Performance, 28/40-Pin Enhanced FLASH Microcontrollers with CAN

PIC18FXX8
TXBnDLC (Transmit Buffer n Data
Length Code) ................................................... 207
TXBnDm (Transmit Buffer n
Data Field Byte m) ........................................... 206
TXBnEIDH (Transmit Buffer n
Extended Identifier, High Byte) ........................ 205
TXBnEIDL (Transmit Buffer n
Extended Identifier, Low Byte) ......................... 206
TXBnSIDH (Transmit Buffer n
Standard Identifier, High Byte) ......................... 205
TXBnSIDL (Transmit Buffer n
Standard Identifier, Low Byte) .......................... 205
TXERRCNT (Transmit Error Count) ......................... 207
TXSTA (USART Transmit Status) ............................ 181
WDTCON (Watchdog Timer Control) ....................... 268
RESET ............................................................... 25, 261, 307
MCLR Reset During Normal Operation ...................... 25
MCLR Reset During SLEEP ...................................... 25
Power-on Reset (POR) .............................................. 25
Programmable Brown-out Reset (PBOR) .................. 25
RESET Instruction ...................................................... 25
Stack Full Reset ......................................................... 25
Stack Underflow Reset ............................................... 25
Watchdog Timer (WDT) Reset ................................... 25
RETFIE ............................................................................ 308
RETLW ............................................................................. 308
RETURN .......................................................................... 309
Revision History ............................................................... 365
RLCF ................................................................................ 309
RLNCF ............................................................................. 310
RRCF ............................................................................... 310
RRNCF ............................................................................. 311
S
Sales and Support ............................................................ 381
SCI. See USART
SCK pin ............................................................................ 141
SDI pin ............................................................................. 141
SDO pin ............................................................................ 141
Serial Clock (SCK) pin ..................................................... 141
Serial Communication Interface. See USART
Serial Peripheral Interface. See SPI
SETF ................................................................................ 311
Slave Select (SS) Pin ....................................................... 141
Slave Select Synchronization ........................................... 147
Slave Select, SS pin ......................................................... 141
SLEEP .............................................................. 261, 270, 312
Software Simulator (MPLAB SIM) .................................... 320
Special Event Trigger. See Compare
Special Features of the CPU ............................................ 261
Configuration bits ..................................................... 261
Configuration bits and Device IDs ............................ 261
Configuration Registers .................................... 262–267
Special Function Register Map .......................................... 47
Special Function Registers ................................................ 44
SPI Mode
Associated Registers ............................................... 149
Bus Mode Compatibility ........................................... 149
Effects of a RESET .................................................. 149
Master Mode ............................................................ 146
Master/Slave Connection ......................................... 145
Serial Clock .............................................................. 141
Serial Data In (SDI) pin ............................................ 141
Serial Data Out (SDO) pin ........................................ 141
Slave Mode .............................................................. 147
Slave Select ............................................................. 141
Slave Select Synchronization .................................. 147
SLEEP Operation .................................................... 149
SPI Clock ................................................................. 146
SSPBUF Register .................................................... 146
SSPSR Register ...................................................... 146
SSPOV bit ........................................................................ 171
SSPSTAT Register
R/W bit ..............................................................154, 155
SUBFWB ......................................................................... 312
SUBLW ............................................................................ 313
SUBWF ............................................................................ 313
SUBWFB ......................................................................... 314
SWAPF ............................................................................ 314
T
Table Pointer Operations (table) ........................................ 68
TBLRD ............................................................................. 315
TBLWT ............................................................................. 316
Timer0 .............................................................................. 107
16-bit Mode Timer Reads and Writes ...................... 109
Clock Source Edge Select (T0SE bit) ...................... 109
Clock Source Select (T0CS bit) ............................... 109
Operation ................................................................. 109
Overflow Interrupt .................................................... 109
Prescaler .................................................................. 109
Prescaler. See Prescaler, Timer0
Switching Prescaler Assignment ............................. 109
Timer1 .............................................................................. 111
Associated Registers ............................................... 113
Operation ................................................................. 112
Oscillator ...........................................................111, 113
Overflow Interrupt .............................................111, 113
Special Event Trigger (CCP) ............................113, 124
Special Event Trigger (ECCP) ................................. 131
TMR1H Register ...................................................... 111
TMR1L Register ....................................................... 111
TMR3L Register ....................................................... 117
Timer2 .............................................................................. 115
Associated Registers ............................................... 116
Operation ................................................................. 115
Postscaler. See Postscaler, Timer2
PR2 Register ....................................................115, 126
Prescaler. See Prescaler, Timer2
SSP Clock Shift ................................................115, 116
TMR2 Register ......................................................... 115
TMR2 to PR2 Match Interrupt ...................115, 116, 126
Timer3 .............................................................................. 117
Associated Registers ............................................... 119
Operation ................................................................. 118
Oscillator .................................................................. 119
Overflow Interrupt .............................................117, 119
Special Event Trigger (CCP) ................................... 119
TMR3H Register ...................................................... 117
Timing Conditions ............................................................ 336
Load Conditions for Device Specifications .............. 336
Temperature and Voltage
Specifications - AC .......................................... 336
Timing Diagrams
A/D Conversion ........................................................ 353
Acknowledge Sequence .......................................... 174
Baud Rate Generator with Clock Arbitration ............ 168
BRG Reset Due to SDA Arbitration During
START Condition ............................................. 178
Brown-out Reset (BOR) and Low
Voltage Detect ................................................. 339
DS41159B-page 376
Preliminary
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