PIC18F258 Datasheet, PDF (216/384 Pages) Microchip Technology – High Performance, 28/40-Pin Enhanced FLASH Microcontrollers with CAN

PIC18FXX8
REGISTER 19-26: RXMnSIDL – RECEIVE ACCEPTANCE MASK n STANDARD IDENTIFIER MASK,
LOW BYTE
R/W-x R/W-x R/W-x
U-0
U-0
U-0
R/W-x R/W-x
SID2
SID1
SID0
—
—
—
EID17 EID16
bit 7
bit 0
bit 7-5
bit 4-2
bit 1-0
SID2:SID0: Standard Identifier Mask bits, or Extended Identifier Mask bits EID20:EID18
Unimplemented: Read as ’0’
EID17:EID16: Extended Identifier Mask bits
Legend:
R = Readable bit
- n = Value at POR
W = Writable bit
’1’ = Bit is set
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared x = Bit is unknown
REGISTER 19-27: RXMnEIDH – RECEIVE ACCEPTANCE MASK n EXTENDED IDENTIFIER MASK,
HIGH BYTE
R/W-x
EID15
bit 7
R/W-x
EID14
R/W-x
EID13
R/W-x
EID12
R/W-x
EID11
R/W-x
EID10
R/W-x
EID9
R/W-x
EID8
bit 0
bit 7-0
EID15:EID8: Extended Identifier Mask bits
Legend:
R = Readable bit
- n = Value at POR
W = Writable bit
’1’ = Bit is set
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared x = Bit is unknown
REGISTER 19-28: RXMnEIDL – RECEIVE ACCEPTANCE MASK n EXTENDED IDENTIFIER MASK,
LOW BYTE
R/W-x
EID7
bit 7
R/W-x
EID6
R/W-x
EID5
R/W-x
EID4
R/W-x
EID3
R/W-x
EID2
R/W-x
EID1
R/W-x
EID0
bit 0
bit 7-0
EID7:EID0: Extended Identifier Mask bits
Legend:
R = Readable bit
- n = Value at POR
W = Writable bit
’1’ = Bit is set
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared x = Bit is unknown
DS41159B-page 214
Preliminary
 2002 Microchip Technology Inc.