PIC18FXX8 Datasheet, PDF (53/402 Pages) Microchip Technology – 28/40-Pin High-Performance, Enhanced Flash Microcontrollers with CAN Module

PIC18FXX8
TABLE 4-2: REGISTER FILE SUMMARY (CONTINUED)
File Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on Details on
POR, BOR Page:
IPR1
PIR1
PIE1
TRISE⁽¹⁾
TRISD⁽¹⁾
PSPIP⁽¹⁾
PSPIF⁽¹⁾
PSPIE⁽¹⁾
ADIP
ADIF
ADIE
RCIP
RCIF
RCIE
TXIP
TXIF
TXIE
IBF
OBF
IBOV
PSPMODE
Data Direction Control Register for PORTD⁽¹⁾
SSPIP
SSPIF
SSPIE
—
CCP1IP TMR2IP TMR1IP
CCP1IF TMR2IF TMR1IF
CCP1IE TMR2IE TMR1IE
Data Direction bits for PORTE⁽¹⁾
1111 1111
0000 0000
0000 0000
0000 -111
1111 1111
32, 88
32, 82
32, 85
33, 105
33, 102
TRISC
Data Direction Control Register for PORTC
1111 1111 33, 100
TRISB
TRISA⁽³⁾
LATE⁽¹⁾
LATD⁽¹⁾
Data Direction Control Register for PORTB
—
Data Direction Control Register for PORTA
—
—
—
—
Read PORTD Data Latch, Write PORTD Data Latch⁽¹⁾
—
Read PORTE Data Latch, Write
PORTE Data Latch⁽¹⁾
1111 1111
-111 1111
---- -xxx
33, 96
33, 93
33, 104
xxxx xxxx 33, 102
LATC
Read PORTC Data Latch, Write PORTC Data Latch
xxxx xxxx 33, 100
LATB
LATA⁽³⁾
PORTE⁽¹⁾
PORTD⁽¹⁾
Read PORTB Data Latch, Write PORTB Data Latch
—
Read PORTA Data Latch, Write PORTA Data Latch
—
—
—
—
—
Read PORTD pins, Write PORTD Data Latch⁽¹⁾
xxxx xxxx
-xxx xxxx
Read PORTE pins, Write PORTE Data ---- -xxx
Latch⁽¹⁾
xxxx xxxx
33, 96
33, 93
33, 104
33, 102
PORTC
Read PORTC pins, Write PORTC Data Latch
xxxx xxxx 33, 100
PORTB
PORTA⁽³⁾
Read PORTB pins, Write PORTB Data Latch
—
Read PORTA pins, Write PORTA Data Latch
xxxx xxxx
-x0x 0000
33, 96
33, 93
TXERRCNT
TEC7
TEC6
TEC5
TEC4
TEC3
TEC2
TEC1
TEC0 0000 0000 33, 209
RXERRCNT
REC7
REC6
REC5
REC4
REC3
REC2
REC1
REC0 0000 0000 33, 214
COMSTAT
RXB0OVFL RXB1OVFL TXBO
TXBP
RXBP TXWARN RXWARN EWARN 0000 0000 33, 205
CIOCON
—
—
ENDRHI CANCAP
—
—
—
—
--00 ---- 33, 221
BRGCON3
—
WAKFIL
—
—
—
SEG2PH2 SEG2PH1 SEG2PH0 -0-- -000 33, 220
BRGCON2
SEG2PHTS
SAM
SEG1PH2 SEG1PH1 SEG1PH0 PRSEG2 PRSEG1 PRSEG0 0000 0000 33, 219
BRGCON1
SJW1
SJW0
BRP5
BRP4
BRP3
BRP2
BRP1
BRP0 0000 0000 33, 218
CANCON
REQOP2 REQOP1 REQOP0
ABAT
WIN2
WIN1
WIN0
—
xxxx xxx- 33, 201
CANSTAT
OPMODE2 OPMODE1 OPMODE0
—
ICODE2 ICODE1 ICODE0
—
xxx- xxx- 33, 202
RXB0D7
RXB0D77 RXB0D76 RXB0D75 RXB0D74 RXB0D73 RXB0D72 RXB0D71 RXB0D70 xxxx xxxx 33, 214
RXB0D6
RXB0D67 RXB0D66 RXB0D65 RXB0D64 RXB0D63 RXB0D62 RXB0D61 RXB0D60 xxxx xxxx 33, 214
RXB0D5
RXB0D57 RXB0D56 RXB0D55 RXB0D54 RXB0D53 RXB0D52 RXB0D51 RXB0D50 xxxx xxxx 33, 214
RXB0D4
RXB0D47 RXB0D46 RXB0D45 RXB0D44 RXB0D43 RXB0D42 RXB0D41 RXB0D40 xxxx xxxx 33, 214
RXB0D3
RXB0D37 RXB0D36 RXB0D35 RXB0D34 RXB0D33 RXB0D32 RXB0D31 RXB0D30 xxxx xxxx 33, 214
RXB0D2
RXB0D27 RXB0D26 RXB0D25 RXB0D24 RXB0D23 RXB0D22 RXB0D21 RXB0D20 xxxx xxxx 33, 214
RXB0D1
RXB0D17 RXB0D16 RXB0D15 RXB0D14 RXB0D13 RXB0D12 RXB0D11 RXB0D10 xxxx xxxx 33, 214
RXB0D0
RXB0D07 RXB0D06 RXB0D05 RXB0D04 RXB0D03 RXB0D02 RXB0D01 RXB0D00 xxxx xxxx 33, 214
RXB0DLC
—
RXRTR
RB1
RB0
DLC3
DLC2
DLC1
DLC0 -xxx xxxx 34, 213
RXB0EIDL
EID7
EID6
EID5
EID4
EID3
EID2
EID1
EID0 xxxx xxxx 34, 213
RXB0EIDH
EID15
EID14
EID13
EID12
EID11
EID10
EID9
EID8 xxxx xxxx 34, 212
RXB0SIDL
SID2
SID1
SID0
SRR
EXID
—
EID17
EID16 xxxx x-xx 34, 212
RXB0SIDH
SID10
SID9
SID8
SID7
SID6
SID5
SID4
SID3 xxxx xxxx 34, 212
RXB0CON
RXFUL
RXM1
RXM0
—
RXRTRRO RXB0DBEN JTOFF FILHIT0 000- 0000 34, 210
Legend:
Note 1:
2:
3:
x = unknown, u = unchanged, - = unimplemented, q = value depends on condition
These registers or register bits are not implemented on the PIC18F248 and PIC18F258 and read as ‘0’s.
Bit 21 of the TBLPTRU allows access to the device configuration bits.
RA6 and associated bits are configured as port pins in RCIO and ECIO Oscillator mode only and read ‘0’ in all other oscillator modes.
 2004 Microchip Technology Inc.
DS41159D-page 51