PIC18FXX8 Datasheet, PDF (389/402 Pages) Microchip Technology – 28/40-Pin High-Performance, Enhanced Flash Microcontrollers with CAN Module

INDEX
A
A/D .................................................................................... 241
A/D Converter Flag (ADIF Bit) .................................. 243
A/D Converter Interrupt, Configuring ........................ 244
Acquisition Requirements ......................................... 244
Acquisition Time........................................................ 245
ADCON0 Register..................................................... 241
ADCON1 Register..................................................... 241
ADRESH Register..................................................... 241
ADRESH/ADRESL Registers ................................... 243
ADRESL Register ..................................................... 241
Analog Port Pins, Configuring................................... 246
Associated Registers Summary................................ 248
Calculating the Minimum Required
Acquisition Time ............................................... 245
Configuring the Module............................................. 244
Conversion Clock (TAD) ............................................ 246
Conversion Status (GO/DONE Bit) ........................... 243
Conversion TAD Cycles............................................. 248
Conversions .............................................................. 247
Minimum Charging Time........................................... 245
Result Registers........................................................ 247
Selecting the Conversion Clock ................................ 246
Special Event Trigger (CCP)..................................... 126
Special Event Trigger (ECCP) .......................... 133, 248
TAD vs. Device Operating Frequencies
(For Extended, LF Devices) (table)................... 246
TAD vs. Device Operating
Frequencies (table) ........................................... 246
Use of the ECCP Trigger .......................................... 248
Absolute Maximum Ratings .............................................. 329
AC (Timing) Characteristics .............................................. 341
Parameter Symbology .............................................. 341
Access Bank ....................................................................... 54
ACKSTAT ......................................................................... 173
ACKSTAT Status Flag ...................................................... 173
ADCON0 Register............................................................. 241
GO/DONE Bit............................................................ 243
ADCON1 Register............................................................. 241
ADDLW ............................................................................. 287
Addressable Universal Synchronous Asynchronous
Receiver Transmitter. See USART.
ADDWF ............................................................................. 287
ADDWFC .......................................................................... 288
ADRESH Register............................................................. 241
ADRESH/ADRESL Registers ........................................... 243
ADRESL Register ............................................................. 241
Analog-to-Digital Converter. See A/D.
ANDLW ............................................................................. 288
ANDWF ............................................................................. 289
Assembler
MPASM Assembler................................................... 323
Associated Registers ................................................ 192, 197
B
Bank Select Register (BSR)................................................ 54
Baud Rate Generator ........................................................ 169
BC ..................................................................................... 289
BCF ................................................................................... 290
BF ..................................................................................... 173
BF Status Flag .................................................................. 173
PIC18FXX8
Block Diagrams
A/D............................................................................ 243
Analog Input Model........................................... 244, 253
Baud Rate Generator ............................................... 169
CAN Buffers and Protocol Engine ............................ 200
CAN Receive Buffer ................................................. 230
CAN Transmit Buffer ................................................ 227
Capture Mode Operation .......................................... 125
Comparator I/O Operating Modes ............................ 250
Comparator Output................................................... 252
Comparator Voltage Reference
Output Buffer Example ..................................... 257
Compare (CCP Module) Mode Operation ................ 126
Enhanced PWM........................................................ 134
Interrupt Logic............................................................. 78
Low-Voltage Detect (LVD)........................................ 260
Low-Voltage Detect with External Input.................... 260
MSSP (I²C Master Mode)......................................... 167
MSSP (I²C Mode)..................................................... 152
MSSP (SPI Mode) .................................................... 143
On-Chip Reset Circuit................................................. 25
OSC2/CLKO/RA6 Pin................................................. 94
PIC18F248/258 Architecture ........................................ 8
PIC18F448/458 Architecture ........................................ 9
PLL ............................................................................. 19
PORTC (Peripheral Output Override)....................... 100
PORTD and PORTE (Parallel Slave Port)................ 107
PORTD in I/O Port Mode.......................................... 102
PORTE ..................................................................... 104
PWM (CCP Module) ................................................. 128
RA3:RA0 and RA5 Pins.............................................. 94
RA4/T0CKI Pin ........................................................... 94
RB1:RB0 Pins............................................................. 97
RB2/CANTX/INT2 Pin ................................................ 98
RB3/CANRX Pin......................................................... 98
RB7:RB4 Pins............................................................. 97
Reads from Flash Program Memory .......................... 69
Table Read Operation ................................................ 65
Table Write Operation ................................................ 66
Table Writes to Flash Program Memory ..................... 71
Timer0 in 16-bit Mode............................................... 110
Timer0 in 8-bit Mode................................................. 110
Timer1 ...................................................................... 114
Timer1 (16-bit Read/Write Mode) ............................. 114
Timer2 ...................................................................... 118
Timer3 ...................................................................... 120
Timer3 (16-bit Read/Write Mode) ............................. 120
USART Receive ....................................................... 191
USART Transmit ...................................................... 189
Voltage Reference.................................................... 256
Watchdog Timer ....................................................... 273
BN..................................................................................... 290
BNC .................................................................................. 291
BNN .................................................................................. 291
BNOV ............................................................................... 292
BNZ .................................................................................. 292
BOR. See Brown-out Reset.
BOV .................................................................................. 295
BRA .................................................................................. 293
BRG. See Baud Rate Generator.
Brown-out Reset (BOR).............................................. 26, 265
 2004 Microchip Technology Inc.
DS41159D-page 387