PIC18FXX8 Datasheet, PDF (347/402 Pages) Microchip Technology – 28/40-Pin High-Performance, Enhanced Flash Microcontrollers with CAN Module

PIC18FXX8
FIGURE 27-8:
RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER AND
POWER-UP TIMER TIMING
VDD
MCLR
Internal
POR
PWRT
Time-out
Oscillator
Time-out
Internal
Reset
Watchdog
Timer
Reset
33
32
I/O Pins
Note: Refer to Figure 27-5 for load conditions.
30
31
34
34
FIGURE 27-9:
BROWN-OUT RESET AND LOW-VOLTAGE DETECT TIMING
VDD
VIRVST
BVDD (for 35)
VLVD (for 37)
35, 37
Enable Internal
Reference Voltage
Internal Reference
Voltage Stable
36
VBGAP = 1.2V
TABLE 27-9: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER, POWER-UP TIMER,
BROWN-OUT RESET AND LOW-VOLTAGE DETECT REQUIREMENTS
Param
No.
Symbol
Characteristic
Min
Typ
Max
Units
Conditions
30
TmcL MCLR Pulse Width (low)
2
—
—
µs
31
TWDT Watchdog Timer Time-out Period
(no prescaler)
7
18
33
ms
32
TOST
Oscillation Start-up Timer Period
1024 TOSC — 1024 TOSC — TOSC = OSC1 period
33
TPWRT Power-up Timer Period
28
72
132
ms
34
TIOZ
I/O High-Impedance from MCLR Low
—
2
—
µs
or Watchdog Timer Reset
35
TBOR Brown-out Reset Pulse Width
200
—
—
µs For VDD ≤ BVDD (see D005)
36
TIRVST Time for Internal Reference
Voltage to become stable
—
20
50
µs
37
TLVD
Low-Voltage Detect Pulse Width
200
—
—
µs For VDD ≤ VLVD (see D420)
 2004 Microchip Technology Inc.
DS41159D-page 345