PIC18FXX8 Datasheet, PDF (350/402 Pages) Microchip Technology – 28/40-Pin High-Performance, Enhanced Flash Microcontrollers with CAN Module

PIC18FXX8
FIGURE 27-12:
RE2/CS
PARALLEL SLAVE PORT TIMING (PIC18F248 AND PIC18F458)
RE0/RD
RE1/WR
65
RD7:RD0
64
Note: Refer to Figure 27-5 for load conditions.
62
63
TABLE 27-12: PARALLEL SLAVE PORT REQUIREMENTS (PIC18F248 AND PIC18F458)
Param
No.
Symbol
Characteristic
Min Max Units
Conditions
62
TdtV2wrH Data-In Valid before WR ↑ or CS ↑
(setup time)
20 — ns
25 — ns Extended Temp. range
63
TwrH2dtI WR ↑ or CS ↑ to Data-In Invalid PIC18FXX8 20 — ns
(hold time)
PIC18LFXX8 35 — ns
64
TrdL2dtV RD ↓ and CS ↓ to Data-Out Valid
— 80 ns
— 90 ns Extended Temp. range
65
TrdH2dtI RD ↑ or CS ↓ to Data-Out Invalid
10 30 ns
66
TibfINH Inhibit the IBF flag bit being cleared from
WR ↑ or CS ↑
— 3 TCY ns
DS41159D-page 348
 2004 Microchip Technology Inc.