PIC18FXX8 Datasheet, PDF (34/402 Pages) Microchip Technology – 28/40-Pin High-Performance, Enhanced Flash Microcontrollers with CAN Module

PIC18FXX8
TABLE 3-3: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Register
Applicable Devices
Power-on Reset,
Brown-out Reset
MCLR Reset
WDT Reset
RESET Instruction
Stack Resets
Wake-up via WDT
or Interrupt
ADCON1
PIC18F2X8 PIC18F4X8
00-- 0000
00-- 0000
uu-- uuuu
CCPR1H
PIC18F2X8 PIC18F4X8
xxxx xxxx
uuuu uuuu
uuuu uuuu
CCPR1L
PIC18F2X8 PIC18F4X8
xxxx xxxx
uuuu uuuu
uuuu uuuu
CCP1CON
PIC18F2X8 PIC18F4X8
--00 0000
--00 0000
--uu uuuu
ECCPR1H
PIC18F2X8 PIC18F4X8
xxxx xxxx
uuuu uuuu
uuuu uuuu
ECCPR1L
PIC18F2X8 PIC18F4X8
xxxx xxxx
uuuu uuuu
uuuu uuuu
ECCP1CON
PIC18F2X8 PIC18F4X8
0000 0000
0000 0000
0000 0000
ECCP1DEL
PIC18F2X8 PIC18F4X8
0000 0000
0000 0000
0000 0000
ECCPAS
PIC18F2X8 PIC18F4X8
0000 0000
0000 0000
0000 0000
CVRCON
PIC18F2X8 PIC18F4X8
0000 0000
0000 0000
uuuu uuuu
CMCON
PIC18F2X8 PIC18F4X8
0000 0000
0000 0000
uuuu uuuu
TMR3H
PIC18F2X8 PIC18F4X8
xxxx xxxx
uuuu uuuu
uuuu uuuu
TMR3L
PIC18F2X8 PIC18F4X8
xxxx xxxx
uuuu uuuu
uuuu uuuu
T3CON
PIC18F2X8 PIC18F4X8
0000 0000
uuuu uuuu
uuuu uuuu
SPBRG
PIC18F2X8 PIC18F4X8
0000 0000
0000 0000
uuuu uuuu
RCREG
PIC18F2X8 PIC18F4X8
0000 0000
0000 0000
uuuu uuuu
TXREG
PIC18F2X8 PIC18F4X8
0000 0000
0000 0000
uuuu uuuu
TXSTA
PIC18F2X8 PIC18F4X8
0000 -010
0000 -010
uuuu -uuu
RCSTA
PIC18F2X8 PIC18F4X8
0000 000x
0000 000u
uuuu uuuu
EEADR
PIC18F2X8 PIC18F4X8
xxxx xxxx
uuuu uuuu
uuuu uuuu
EEDATA
PIC18F2X8 PIC18F4X8
xxxx xxxx
uuuu uuuu
uuuu uuuu
EECON2
PIC18F2X8 PIC18F4X8
xxxx xxxx
uuuu uuuu
uuuu uuuu
EECON1
PIC18F2X8 PIC18F4X8
xx-0 x000
uu-0 u000
uu-0 u000
IPR3
PIC18F2X8 PIC18F4X8
1111 1111
1111 1111
uuuu uuuu
PIR3
PIC18F2X8 PIC18F4X8
0000 0000
0000 0000
uuuu uuuu
PIE3
PIC18F2X8 PIC18F4X8
0000 0000
0000 0000
uuuu uuuu
IPR2
PIR2
PIC18F2X8 PIC18F4X8
PIC18F2X8 PIC18F4X8
-1-1 1111
-0-0 0000
-1-1 1111
-0-0 0000
-u-u uuuu
-u-u uuuu⁽¹⁾
PIE2
PIC18F2X8 PIC18F4X8
-0-0 0000
-0-0 0000
-u-u uuuu
IPR1
PIR1
PIC18F2X8 PIC18F4X8
PIC18F2X8 PIC18F4X8
1111 1111
0000 0000
1111 1111
0000 0000
uuuu uuuu
uuuu uuuu⁽¹⁾
PIE1
PIC18F2X8 PIC18F4X8
0000 0000
0000 0000
uuuu uuuu
Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
Note 1: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the
interrupt vector (0008h or 0018h).
3: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the
hardware stack.
4: See Table 3-2 for Reset value for specific condition.
5: Bit 6 of PORTA, LATA and TRISA are enabled in ECIO and RCIO Oscillator modes only. In all other
oscillator modes, they are disabled and read ‘0’.
6: Values for CANSTAT also apply to its other instances (CANSTATRO1 through CANSTATRO4).
DS41159D-page 32
 2004 Microchip Technology Inc.