PIC18FXX8 Datasheet, PDF (231/402 Pages) Microchip Technology – 28/40-Pin High-Performance, Enhanced Flash Microcontrollers with CAN Module

PIC18FXX8
FIGURE 19-3:
INTERNAL TRANSMIT MESSAGE FLOWCHART
Start
No
Are any
TXREQ
bits = 1?
The message transmission sequence begins when
the device determines that the TXREQ for any of the
transmit registers has been set.
Yes
Clear: TXABT, TXLARB
and TXERR
Clearing the TXREQ bit while it is set, or setting
the ABAT bit before the message has started
transmission, will abort the message.
Is CAN bus
No
Available to Start
Transmission?
Yes
Examine TXPRI <1:0> to
Determine Highest Priority Message
Begin Transmission (SOF)
No
Is
Yes
TXREQ = 0
ABAT = 1?
Was
No
Message Transmitted
Successfully?
Set
TXERR = 1
Yes
Set TXREQ = 0
Yes
Generate
Interrupt
Is
TXIE = 1?
No
Set
TXBUFE = 1
The TXIE bit determines if an inter-
rupt should be generated when a
message is successfully transmitted.
Is
TXLARB = 1?
A message can also be No
aborted if a message
error or lost arbitration
condition occurred during
transmission.
Is
TXREQ = 0
or TXABT = 1?
No
Yes _{Arbitration Lost During}
Transmission
Yes
Abort Transmission:
Set TXABT = 1
END
 2004 Microchip Technology Inc.
DS41159D-page 229