English
Language : 

PIC18FXX8 Datasheet, PDF (50/402 Pages) Microchip Technology – 28/40-Pin High-Performance, Enhanced Flash Microcontrollers with CAN Module
PIC18FXX8
TABLE 4-1: SPECIAL FUNCTION REGISTER MAP (CONTINUED)
Address
Name
F7Fh
—
F7Eh
—
F7Dh
—
F7Ch
—
F7Bh
—
F7Ah
—
F79h
—
F78h
—
F77h
—
F76h TXERRCNT
F75h RXERRCNT
F74h COMSTAT
F73h CIOCON
F72h BRGCON3
F71h BRGCON2
F70h BRGCON1
F6Fh CANCON
F6Eh CANSTAT
F6Dh RXB0D7(3)
F6Ch RXB0D6(3)
F6Bh RXB0D5(3)
F6Ah RXB0D4(3)
F69h RXB0D3(3)
F68h RXB0D2(3)
F67h RXB0D1(3)
F66h RXB0D0(3)
F65h RXB0DLC(3)
F64h RXB0EIDL(3)
F63h RXB0EIDH(3)
F62h RXB0SIDL(3)
F61h RXB0SIDH(3)
F60h RXB0CON(3)
Address
Name
F5Fh
—
F5Eh CANSTATRO1(4)
F5Dh RXB1D7
F5Ch RXB1D6
F5Bh RXB1D5
F5Ah RXB1D4
F59h RXB1D3
F58h RXB1D2
F57h RXB1D1
F56h RXB1D0
F55h RXB1DLC
F54h RXB1EIDL
F53h RXB1EIDH
F52h RXB1SIDL
F51h RXB1SIDH
F50h RXB1CON
F4Fh
—
F4Eh CANSTATRO2(4)
F4Dh TXB0D7
F4Ch TXB0D6
F4Bh TXB0D5
F4Ah TXB0D4
F49h TXB0D3
F48h TXB0D2
F47h TXB0D1
F46h TXB0D0
F45h TXB0DLC
F44h TXB0EIDL
F43h TXB0EIDH
F42h TXB0SIDL
F41h TXB0SIDH
F40h TXB0CON
Address
Name
Address Name
F3Fh
—
F3Eh CANSTATRO3(4)
F3Dh TXB1D7
F3Ch TXB1D6
F3Bh TXB1D5
F3Ah TXB1D4
F39h TXB1D3
F38h TXB1D2
F37h TXB1D1
F36h TXB1D0
F35h TXB1DLC
F34h TXB1EIDL
F33h TXB1EIDH
F32h TXB1SIDL
F31h TXB1SIDH
F30h TXB1CON
F2Fh
—
F2Eh CANSTATRO4(4)
F2Dh TXB2D7
F2Ch TXB2D6
F2Bh TXB2D5
F2Ah TXB2D4
F29h TXB2D3
F28h TXB2D2
F27h TXB2D1
F26h TXB2D0
F25h TXB2DLC
F24h TXB2EIDL
F23h TXB2EIDH
F22h TXB2SIDL
F21h TXB2SIDH
F20h TXB2CON
F1Fh RXM1EIDL
F1Eh RXM1EIDH
F1Dh RXM1SIDL
F1Ch RXM1SIDH
F1Bh RXM0EIDL
F1Ah RXM0EIDH
F19h RXM0SIDL
F18h RXM0SIDH
F17h RXF5EIDL
F16h RXF5EIDH
F15h RXF5SIDL
F14h RXF5SIDH
F13h RXF4EIDL
F12h RXF4EIDH
F11h RXF4SIDL
F10h RXF4SIDH
F0Fh RXF3EIDL
F0Eh RXF3EIDH
F0Dh RXF3SIDL
F0Ch RXF3SIDH
F0Bh RXF2EIDL
F0Ah RXF2EIDH
F09h RXF2SIDL
F08h RXF2SIDH
F07h RXF1EIDL
F06h RXF1EIDH
F05h RXF1SIDL
F04h RXF1SIDH
F03h RXF0EIDL
F02h RXF0EIDH
F01h RXF0SIDL
F00h RXF0SIDH
Note: Shaded registers are available in Bank 15, while the rest are in Access Bank low.
Note 1:
2:
3:
4:
5:
Unimplemented registers are read as ‘0’.
This is not a physical register.
Contents of register are dependent on WIN2:WIN0 bits in the CANCON register.
CANSTAT register is repeated in these locations to simplify application firmware. Unique names are given
for each instance of the CANSTAT register due to the Microchip header file requirement.
These registers are not implemented on the PIC18F248 and PIC18F258.
DS41159D-page 48
 2004 Microchip Technology Inc.