PIC18FXX8 Datasheet, PDF (234/402 Pages) Microchip Technology – 28/40-Pin High-Performance, Enhanced Flash Microcontrollers with CAN Module

PIC18FXX8
19.6 Message Acceptance Filters
and Masks
The message acceptance filters and masks are used to
determine if a message in the message assembly
buffer should be loaded into either of the receive buff-
ers. Once a valid message has been received into the
MAB, the identifier fields of the message are compared
to the filter values. If there is a match, that message will
be loaded into the appropriate receive buffer. The filter
masks are used to determine which bits in the identifier
are examined with the filters. A truth table is shown
below in Table 19-2 that indicates how each bit in the
identifier is compared to the masks and filters to deter-
mine if a message should be loaded into a receive
buffer. The mask essentially determines which bits to
apply the acceptance filters to. If any mask bit is set to
a zero, then that bit will automatically be accepted
regardless of the filter bit.
TABLE 19-2: FILTER/MASK TRUTH TABLE
Mask
bit n
Filter bit n
Message
Identifier
bit n001
Accept or
Reject
bit n
0
x
x
1
0
0
1
0
1
1
1
0
1
1
1
Legend: x = don’t care
Accept
Accept
Reject
Reject
Accept
As shown in the receive buffer block diagram
(Figure 19-4), acceptance filters RXF0 and RXF1 and
filter mask RXM0 are associated with RXB0. Filters
RXF2, RXF3, RXF4 and RXF5 and mask RXM1 are
associated with RXB1. When a filter matches and a
message is loaded into the receive buffer, the filter
number that enabled the message reception is loaded
into the FILHIT bit(s).
For RXB1, the RXB1CON register contains the
FILHIT<2:0> bits. They are coded as follows:
• 101 = Acceptance Filter 5 (RXF5)
• 100 = Acceptance Filter 4 (RXF4)
• 011 = Acceptance Filter 3 (RXF3)
• 010 = Acceptance Filter 2 (RXF2)
• 001 = Acceptance Filter 1 (RXF1)
• 000 = Acceptance Filter 0 (RXF0)
Note:
‘000’ and ‘001’ can only occur if the
RXB0DBEN bit is set in the RXB0CON
register allowing RXB0 messages to
rollover into RXB1.
The coding of the RXB0DBEN bit enables these three
bits to be used similarly to the FILHIT bits and to
distinguish a hit on filter RXF0 and RXF1, in either
RXB0, or after a rollover into RXB1.
• 111 = Acceptance Filter 1 (RXF1)
• 110 = Acceptance Filter 0 (RXF0)
• 001 = Acceptance Filter 1 (RXF1)
• 000 = Acceptance Filter 0
If the RXB0DBEN bit is clear, there are six codes
corresponding to the six filters. If the RXB0DBEN bit is
set, there are six codes corresponding to the six filters
plus two additional codes corresponding to RXF0 and
RXF1 filters that rollover into RXB1.
If more than one acceptance filter matches, the FILHIT
bits will encode the binary value of the lowest
numbered filter that matched. In other words, if filter
RXF2 and filter RXF4 match, FILHIT will be loaded with
the value for RXF2. This essentially prioritizes the
acceptance filters with a lower number filter having
higher priority. Messages are compared to filters in
ascending order of filter number.
The mask and filter registers can only be modified
when the PIC18FXX8 is in Configuration mode. The
mask and filter registers cannot be read outside of
Configuration mode. When outside of Configuration
mode, all mask and filter registers will be read as ‘0’.
FIGURE 19-6:
MESSAGE ACCEPTANCE MASK AND FILTER OPERATION
Acceptance Filter Register
Acceptance Mask Register
RXFn₀
RXFn₁
RXMn₀
RXMn₁
RxRqst
RXFn_n
RXMn_n
Message Assembly Buffer
Identifier
DS41159D-page 232
 2004 Microchip Technology Inc.