PIC18FXX8 Datasheet, PDF (102/402 Pages) Microchip Technology – 28/40-Pin High-Performance, Enhanced Flash Microcontrollers with CAN Module

PIC18FXX8
9.3 PORTC, TRISC and LATC
Registers
PORTC is an 8-bit wide, bidirectional port. The corre-
sponding Data Direction register is TRISC. Setting a
TRISC bit (= 1) will make the corresponding PORTC
pin an input (i.e., put the corresponding output driver in
a high-impedance mode). Clearing a TRISC bit (= 0)
will make the corresponding PORTC pin an output (i.e.,
put the contents of the output latch on the selected pin).
Read-modify-write operations on the LATC register,
read and write the latched output value for PORTC.
PORTC is multiplexed with several peripheral functions
(Table 9-5). PORTC pins have Schmitt Trigger input
buffers.
When enabling peripheral functions, care should be
taken in defining TRIS bits for each PORTC pin. Some
peripherals override the TRIS bit to make a pin an output,
while other peripherals override the TRIS bit to make a
pin an input. The user should refer to the corresponding
peripheral section for the correct TRIS bit settings.
The pin override value is not loaded into the TRIS
register. This allows read-modify-write of the TRIS
register, without concern due to peripheral overrides.
EXAMPLE 9-3:
CLRF PORTC
CLRF LATC
MOVLW 0CFh
MOVWF TRISC
INITIALIZING PORTC
; Initialize PORTC by
; clearing output
; data latches
; Alternate method
; to clear output
; data latches
; Value used to
; initialize data
; direction
; Set RC3:RC0 as inputs
; RC5:RC4 as outputs
; RC7:RC6 as inputs
FIGURE 9-8:
PORTC BLOCK DIAGRAM (PERIPHERAL OUTPUT OVERRIDE)
Peripheral Out Select
Peripheral Data Out
RD LATC
Data Bus
WR LATC
or
WR PORTC
WR TRISC
D
Q
CK Q
Data Latch
D
Q
CK Q
TRIS Latch
RD TRISC
Peripheral Enable
RD PORTC
Peripheral Data In
0
VDD
P
1
N
TRIS
VSS
Override
Schmitt
Trigger
Q
D
EN
I/O pin⁽¹⁾
TRIS OVERRIDE
Pin Override Peripheral
RC0
RC1
RC2
RC3
RC4
RC5
RC6
RC7
Yes Timer1 Oscillator
for Timer1/Timer3
Yes Timer1 Oscillator
for Timer1/Timer3
No —
Yes SPI™/I²C™
Master Clock
Yes I²C Data Out
Yes SPI Data Out
Yes USART Async
Xmit, Sync Clock
Yes USART Sync Data
Out
Note 1: I/O pins have diode protection to VDD and VSS.
DS41159D-page 100
 2004 Microchip Technology Inc.