PIC18FXX8 Datasheet, PDF (120/402 Pages) Microchip Technology – 28/40-Pin High-Performance, Enhanced Flash Microcontrollers with CAN Module

PIC18FXX8
13.2 Timer2 Interrupt
The Timer2 module has an 8-bit period register, PR2.
Timer2 increments from 00h until it matches PR2 and
then resets to 00h on the next increment cycle. PR2 is
a readable and writable register. The PR2 register is
initialized to FFh upon Reset.
FIGURE 13-1:
TIMER2 BLOCK DIAGRAM
13.3 Output of TMR2
The output of TMR2 (before the postscaler) is a clock
input to the Synchronous Serial Port module which
optionally uses it to generate the shift clock.
TMR2
Output⁽¹⁾
Sets Flag
bit TMR2IF
FOSC/4
Prescaler
1:1, 1:4, 1:16
2
T2CKPS1:T2CKPS0
TMR2
Reset
Comparator
Postscaler
EQ ^{1:1 to 1:16}
PR2
4
TOUTPS3:TOUTPS0
Note 1: TMR2 register output can be software selected by the SSP module as a baud clock.
TABLE 13-1: REGISTERS ASSOCIATED WITH TIMER2 AS A TIMER/COUNTER
Name Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
Value on
all other
Resets
INTCON
PIR1
PIE1
IPR1
GIE/GIEH
PSPIF⁽¹⁾
PSPIE⁽¹⁾
PSPIP⁽¹⁾
PEIE/GIEL
ADIF
ADIE
ADIP
TMR0IE
RCIF
RCIE
RCIP
INT0IE
TXIF
TXIE
TXIP
RBIE
SSPIF
SSPIE
SSPIP
TMR0IF
CCP1IF
CCP1IE
CCP1IP
INT0IF
TMR2IF
TMR2IE
TMR2IP
RBIF
TMR1IF
TMR1IE
TMR1IP
0000 000x 0000 000u
0000 0000 0000 0000
0000 0000 0000 0000
1111 1111 1111 1111
TMR2 Timer2 Module Register
0000 0000 0000 0000
T2CON
—
TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0 TMR2ON T2CKPS1 T2CKPS0 -000 0000 -000 0000
PR2 Timer2 Period Register
1111 1111 1111 1111
Legend: x = unknown, u = unchanged, - = unimplemented, read as ‘0’. Shaded cells are not used by the Timer2 module.
Note 1: These registers or register bits are not implemented on the PIC18F248 and PIC18F258 and read as ‘0’s.
DS41159D-page 118
 2004 Microchip Technology Inc.