PIC18FXX8 Datasheet, PDF(35/402 Page) Microchip Technology – 28/40-Pin High-Performance, Enhanced Flash Microcontrollers with CAN Module

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PIC18FXX8 Datasheet, PDF (35/402 Pages) Microchip Technology – 28/40-Pin High-Performance, Enhanced Flash Microcontrollers with CAN Module

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PIC18FXX8

TABLE 3-3: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)

Register

Applicable Devices

Power-on Reset,

Brown-out Reset

MCLR Reset

WDT Reset

RESET Instruction

Stack Resets

Wake-up via WDT

or Interrupt

TRISE

PIC18F2X8 PIC18F4X8

0000 -111

0000 -111

uuuu -uuu

TRISD

PIC18F2X8 PIC18F4X8

1111 1111

1111 1111

uuuu uuuu

TRISC

PIC18F2X8 PIC18F4X8

1111 1111

1111 1111

uuuu uuuu

TRISB

TRISA(5)

PIC18F2X8 PIC18F4X8

PIC18F2X8 PIC18F4X8

1111 1111

-111 1111(5)

1111 1111

-111 1111(5)

uuuu uuuu

-uuu uuuu(5)

LATE

PIC18F2X8 PIC18F4X8

---- -xxx

---- -uuu

---- -uuu

LATD

PIC18F2X8 PIC18F4X8

xxxx xxxx

uuuu uuuu

uuuu uuuu

LATC

PIC18F2X8 PIC18F4X8

xxxx xxxx

uuuu uuuu

uuuu uuuu

LATB

LATA(5)

PIC18F2X8 PIC18F4X8

PIC18F2X8 PIC18F4X8

xxxx xxxx

-xxx xxxx(5)

uuuu uuuu

-uuu uuuu(5)

uuuu uuuu

-uuu uuuu(5)

PORTE

PIC18F2X8 PIC18F4X8

---- -xxx

---- -000

---- -uuu

PORTD

PIC18F2X8 PIC18F4X8

xxxx xxxx

uuuu uuuu

uuuu uuuu

PORTC

PIC18F2X8 PIC18F4X8

xxxx xxxx

uuuu uuuu

uuuu uuuu

PORTB

PORTA(5)

PIC18F2X8 PIC18F4X8

PIC18F2X8 PIC18F4X8

xxxx xxxx

-x0x 0000(5)

uuuu uuuu

-u0u 0000(5)

uuuu uuuu

-uuu uuuu(5)

TXERRCNT

PIC18F2X8 PIC18F4X8

0000 0000

0000 0000

uuuu uuuu

RXERRCNT

PIC18F2X8 PIC18F4X8

0000 0000

0000 0000

uuuu uuuu

COMSTAT

PIC18F2X8 PIC18F4X8

0000 0000

0000 0000

uuuu uuuu

CIOCON

PIC18F2X8 PIC18F4X8

--00 ----

--00 ----

--uu ----

BRGCON3

PIC18F2X8 PIC18F4X8

-0-- -000

-0-- -000

-u-- -uuu

BRGCON2

PIC18F2X8 PIC18F4X8

0000 0000

0000 0000

uuuu uuuu

BRGCON1

PIC18F2X8 PIC18F4X8

0000 0000

0000 0000

uuuu uuuu

CANCON

CANSTAT(6)

PIC18F2X8 PIC18F4X8

PIC18F2X8 PIC18F4X8

xxxx xxx-

xxx- xxx-

uuuu uuu-

uuu- uuu-

uuuu uuu-

uuu- uuu-

RXB0D7

PIC18F2X8 PIC18F4X8

xxxx xxxx

uuuu uuuu

uuuu uuuu

RXB0D6

PIC18F2X8 PIC18F4X8

xxxx xxxx

uuuu uuuu

uuuu uuuu

RXB0D5

PIC18F2X8 PIC18F4X8

xxxx xxxx

uuuu uuuu

uuuu uuuu

RXB0D4

PIC18F2X8 PIC18F4X8

xxxx xxxx

uuuu uuuu

uuuu uuuu

RXB0D3

PIC18F2X8 PIC18F4X8

xxxx xxxx

uuuu uuuu

uuuu uuuu

RXB0D2

PIC18F2X8 PIC18F4X8

xxxx xxxx

uuuu uuuu

uuuu uuuu

RXB0D1

PIC18F2X8 PIC18F4X8

xxxx xxxx

uuuu uuuu

uuuu uuuu

RXB0D0

PIC18F2X8 PIC18F4X8

xxxx xxxx

uuuu uuuu

uuuu uuuu

Legend: u = unchanged, x = unknown, - = unimplemented bit, read as â0â, q = value depends on condition.

Shaded cells indicate conditions do not apply for the designated device.

Note 1: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).

2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the

interrupt vector (0008h or 0018h).

3: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are

updated with the current value of the PC. The STKPTR is modified to point to the next location in the

hardware stack.

4: See Table 3-2 for Reset value for specific condition.

5: Bit 6 of PORTA, LATA and TRISA are enabled in ECIO and RCIO Oscillator modes only. In all other

oscillator modes, they are disabled and read â0â.

6: Values for CANSTAT also apply to its other instances (CANSTATRO1 through CANSTATRO4).

ï£© 2004 Microchip Technology Inc.

DS41159D-page 33

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