PIC18FXX8 Datasheet, PDF (308/402 Pages) Microchip Technology – 28/40-Pin High-Performance, Enhanced Flash Microcontrollers with CAN Module

PIC18FXX8
MOVFF
Move f to f
Syntax:
Operands:
Operation:
Status Affected:
[ label ] MOVFF f_s,f_d
0 ≤ f_s ≤ 4095
0 ≤ f_d ≤ 4095
(f_s) → f_d
None
Encoding:
1st word (source)
2nd word (destin.)
Description:
1100
1111
ffff
ffff
ffff
ffff
ffff_s
ffff_d
The contents of source register ‘f_s’ are
moved to destination register ‘f_d’.
Location of source ‘f_s’ can be anywhere
in the 4096-byte data space (000h to
FFFh) and location of destination ‘f_d’
can also be anywhere from 000h to
FFFh.
Either source or destination can be W
(a useful special situation).
MOVFF is particularly useful for
transferring a data memory location to a
peripheral register (such as the transmit
buffer or an I/O port).
The MOVFF instruction cannot use the
PCL, TOSU, TOSH or TOSL as the
destination register.
The MOVFF instruction should not be
used to modify interrupt settings while
any interrupt is enabled (see page 77).
Words:
2
Cycles:
2 (3)
Q Cycle Activity:
Q1
Decode
Decode
Q2
Read
register ‘f’
(src)
No
operation
No dummy
read
Q3
Process
Data
No
operation
Q4
No
operation
Write
register ‘f’
(dest)
Example:
MOVFF REG1, REG2
Before Instruction
REG1
=
REG2
=
After Instruction
REG1
=
REG2
=
0x33
0x11
0x33
0x33
MOVLB
Move Literal to Low Nibble in BSR
Syntax:
[ label ] MOVLB k
Operands:
0 ≤ k ≤ 255
Operation:
k → BSR
Status Affected: None
Encoding:
0000 0001 kkkk kkkk
Description:
The 8-bit literal ‘k’ is loaded into the
Bank Select Register (BSR).
Words:
1
Cycles:
1
Q Cycle Activity:
Q1
Decode
Q2
Read literal
‘k’
Q3
Process
Data
Q4
Write
literal ‘k’ to
BSR
Example:
MOVLB 5
Before Instruction
BSR register =
After Instruction
BSR register =
0x02
0x05
DS41159D-page 306
 2004 Microchip Technology Inc.