PIC18FXX8 Datasheet, PDF (192/402 Pages) Microchip Technology – 28/40-Pin High-Performance, Enhanced Flash Microcontrollers with CAN Module

PIC18FXX8
FIGURE 18-2:
Write to TXREG
BRG Output
(Shift Clock)
RC6/TX/CK (pin)
TXIF bit
(Transmit Buffer
Reg. Empty Flag)
TRMT bit
(Transmit Shift
Reg. Empty Flag)
ASYNCHRONOUS TRANSMISSION
Word 1
Start bit
bit 0
bit 1
Word 1
Word 1
Transmit Shift Reg
bit 7/8 _{Stop bit}
FIGURE 18-3:
Write to TXREG
BRG Output
(Shift Clock)
RC6/TX/CK (pin)
TXIF bit
(Interrupt Reg. Flag)
ASYNCHRONOUS TRANSMISSION (BACK TO BACK)
Word 1
Word 2
Start bit
bit 0
bit 1
Word 1
bit 7/8
Stop bit
Start bit
bit 0
Word 2
TRMT bit
(Transmit Shift
Reg. Empty Flag)
Word 1
Transmit Shift Reg.
Note: This timing diagram shows two consecutive transmissions.
Word 2
Transmit Shift Reg.
TABLE 18-6: REGISTERS ASSOCIATED WITH ASYNCHRONOUS TRANSMISSION
Name Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
Value on
all other
Resets
INTCON
PIR1
PIE1
IPR1
GIE/GIEH PEIE/GIEL TMR0IE
PSPIF⁽¹⁾ ADIF
RCIF
PSPIE⁽¹⁾ ADIE
RCIE
PSPIP⁽¹⁾ ADIP
RCIP
INT0IE
TXIF
TXIE
TXIP
RBIE TMR0IF INT0IF RBIF 0000 000x 0000 000u
SSPIF CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000
SSPIE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000
SSPIP CCP1IP TMR2IP TMR1IP 1111 1111 1111 1111
RCSTA SPEN
RX9 SREN CREN ADDEN FERR OERR RX9D 0000 000x 0000 000u
TXREG USART Transmit Register
0000 0000 0000 0000
TXSTA CSRC
TX9 TXEN SYNC — BRGH TRMT TX9D 0000 -010 0000 -010
SPBRG Baud Rate Generator Register
0000 0000 0000 0000
Legend: x = unknown, - = unimplemented locations read as ‘0’. Shaded cells are not used for asynchronous transmission.
Note 1: These registers or register bits are not implemented on the PIC18F248 and PIC18F258 and read as ‘0’s.
DS41159D-page 190
 2004 Microchip Technology Inc.