PIC18FXX8 Datasheet, PDF (33/402 Pages) Microchip Technology – 28/40-Pin High-Performance, Enhanced Flash Microcontrollers with CAN Module

PIC18FXX8
TABLE 3-3: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Register
Applicable Devices
Power-on Reset,
Brown-out Reset
MCLR Reset
WDT Reset
RESET Instruction
Stack Resets
Wake-up via WDT
or Interrupt
FSR1H
PIC18F2X8 PIC18F4X8
---- xxxx
---- uuuu
---- uuuu
FSR1L
PIC18F2X8 PIC18F4X8
xxxx xxxx
uuuu uuuu
uuuu uuuu
BSR
PIC18F2X8 PIC18F4X8
---- 0000
---- 0000
---- uuuu
INDF2
PIC18F2X8 PIC18F4X8
N/A
N/A
N/A
POSTINC2
PIC18F2X8 PIC18F4X8
N/A
N/A
N/A
POSTDEC2
PIC18F2X8 PIC18F4X8
N/A
N/A
N/A
PREINC2
PIC18F2X8 PIC18F4X8
N/A
N/A
N/A
PLUSW2
PIC18F2X8 PIC18F4X8
N/A
N/A
N/A
FSR2H
PIC18F2X8 PIC18F4X8
---- xxxx
---- uuuu
---- uuuu
FSR2L
PIC18F2X8 PIC18F4X8
xxxx xxxx
uuuu uuuu
uuuu uuuu
STATUS
PIC18F2X8 PIC18F4X8
---x xxxx
---u uuuu
---u uuuu
TMR0H
PIC18F2X8 PIC18F4X8
0000 0000
0000 0000
uuuu uuuu
TMR0L
PIC18F2X8 PIC18F4X8
xxxx xxxx
uuuu uuuu
uuuu uuuu
T0CON
PIC18F2X8 PIC18F4X8
1111 1111
1111 1111
uuuu uuuu
OSCCON
PIC18F2X8 PIC18F4X8
---- ---0
---- ---0
---- ---u
LVDCON
PIC18F2X8 PIC18F4X8
--00 0101
--00 0101
--uu uuuu
WDTCON
RCON⁽⁴⁾
PIC18F2X8 PIC18F4X8
PIC18F2X8 PIC18F4X8
---- ---0
0--1 110q
---- ---0
0--0 011q
---- ---u
0--1 101q
TMR1H
PIC18F2X8 PIC18F4X8
xxxx xxxx
uuuu uuuu
uuuu uuuu
TMR1L
PIC18F2X8 PIC18F4X8
xxxx xxxx
uuuu uuuu
uuuu uuuu
T1CON
PIC18F2X8 PIC18F4X8
0-00 0000
u-uu uuuu
u-uu uuuu
TMR2
PIC18F2X8 PIC18F4X8
0000 0000
0000 0000
uuuu uuuu
PR2
PIC18F2X8 PIC18F4X8
1111 1111
1111 1111
1111 1111
T2CON
PIC18F2X8 PIC18F4X8
-000 0000
-000 0000
-uuu uuuu
SSPBUF
PIC18F2X8 PIC18F4X8
xxxx xxxx
uuuu uuuu
uuuu uuuu
SSPADD
PIC18F2X8 PIC18F4X8
0000 0000
0000 0000
uuuu uuuu
SSPSTAT
PIC18F2X8 PIC18F4X8
0000 0000
0000 0000
uuuu uuuu
SSPCON1
PIC18F2X8 PIC18F4X8
0000 0000
0000 0000
uuuu uuuu
SSPCON2
PIC18F2X8 PIC18F4X8
0000 0000
0000 0000
uuuu uuuu
ADRESH
PIC18F2X8 PIC18F4X8
xxxx xxxx
uuuu uuuu
uuuu uuuu
ADRESL
PIC18F2X8 PIC18F4X8
xxxx xxxx
uuuu uuuu
uuuu uuuu
ADCON0
PIC18F2X8 PIC18F4X8
0000 00-0
0000 00-0
uuuu uu-u
Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
Note 1: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the
interrupt vector (0008h or 0018h).
3: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the
hardware stack.
4: See Table 3-2 for Reset value for specific condition.
5: Bit 6 of PORTA, LATA and TRISA are enabled in ECIO and RCIO Oscillator modes only. In all other
oscillator modes, they are disabled and read ‘0’.
6: Values for CANSTAT also apply to its other instances (CANSTATRO1 through CANSTATRO4).
 2004 Microchip Technology Inc.
DS41159D-page 31