PIC18FXX8 Datasheet, PDF (105/402 Pages) Microchip Technology – 28/40-Pin High-Performance, Enhanced Flash Microcontrollers with CAN Module

PIC18FXX8
TABLE 9-7: PORTD FUNCTIONS
Name
Bit# Buffer Type
Function
RD0/PSP0/C1IN+
bit 0
RD1/PSP1/C1IN-
bit 1
RD2/PSP2/C2IN+
bit 2
RD3/PSP3/C2IN-
bit 3
RD4/PSP4/ECCP1/P1A bit 4
RD5/PSP5/P1B
bit 5
RD6/PSP6/P1C
bit 6
RD7/PSP7/P1D
bit 7
ST/TTL⁽¹⁾
ST/TTL⁽¹⁾
ST/TTL⁽¹⁾
ST/TTL⁽¹⁾
ST/TTL⁽¹⁾
ST/TTL⁽¹⁾
ST/TTL⁽¹⁾
ST/TTL⁽¹⁾
Input/output port pin, Parallel Slave Port bit 0 or C1IN+ comparator
input.
Input/output port pin, Parallel Slave Port bit 1 or C1IN- comparator
input.
Input/output port pin, Parallel Slave Port bit 2 or C2IN+ comparator
input.
Input/output port pin, Parallel Slave Port bit 3 or C2IN- comparator
input.
Input/output port pin, Parallel Slave Port bit 4 or ECCP1/P1A pin.
Input/output port pin, Parallel Slave Port bit 5 or P1B pin.
Input/output port pin, Parallel Slave Port bit 6 or P1C pin.
Input/output port pin, Parallel Slave Port bit 7 or P1D pin.
Legend: ST = Schmitt Trigger input, TTL = TTL input
Note 1: Input buffers are Schmitt Triggers when in I/O mode and TTL buffers when in Parallel Slave Port mode.
TABLE 9-8: SUMMARY OF REGISTERS ASSOCIATED WITH PORTD
Name Bit 7 Bit 6 Bit 5
Bit 4
Bit 3 Bit 2
Bit 1
Bit 0
Value on
POR, BOR
Value on
all other
Resets
PORTD RD7 RD6 RD5
RD4
RD3 RD2
RD1 RD0 xxxx xxxx uuuu uuuu
LATD
LATD Data Output Register
xxxx xxxx uuuu uuuu
TRISD PORTD Data Direction Register
1111 1111 1111 1111
TRISE
IBF OBF IBOV PSPMODE — TRISE2 TRISE1 TRISE0 0000 -111 0000 -111
Legend: x = unknown, u = unchanged, - = unimplemented, read as ‘0’. Shaded cells are not used by PORTD.
 2004 Microchip Technology Inc.
DS41159D-page 103