PIC18FXX8 Datasheet, PDF (320/402 Pages) Microchip Technology – 28/40-Pin High-Performance, Enhanced Flash Microcontrollers with CAN Module

PIC18FXX8
SUBWFB
Subtract W from f with Borrow
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Q1
Decode
[ label ] SUBWFB f [,d [,a]]
0 ≤ f ≤ 255
d ∈ [0,1]
a ∈ [0,1]
(f) – (W) – (C) → dest
N, OV, C, DC, Z
0101 10da ffff ffff
Subtract W and the Carry flag (borrow)
from register ‘f’ (2’s complement
method). If ‘d’ is ‘0’, the result is stored
in W. If ‘d’ is ‘1’, the result is stored back
in register ‘f’ (default). If ‘a’ is ‘0’, the
Access Bank will be selected,
overriding the BSR value. If ‘a’ is ‘1’,
then the bank will be selected as per the
BSR value (default).
1
1
Q2
Read
register ‘f’
Q3
Process
Data
Q4
Write to
destination
Example 1:
SUBWFB REG, 1, 0
Before Instruction
REG =
W
=
C
=
After Instruction
REG =
W
=
C
=
Z
=
N
=
0x19
0x0D
0x01
0x0C
0x0D
0x01
0x00
0x00
(0001 1001)
(0000 1101)
(0000 1011)
(0000 1101)
; result is positive
Example 2:
SUBWFB REG, 0, 0
Before Instruction
REG =
W
=
C
=
After Instruction
REG =
W
=
C
=
Z
=
N
=
0x1B
0x1A
0x00
0x1B
0x00
0x01
0x01
0x00
(0001 1011)
(0001 1010)
(0001 1011)
; result is zero
Example 3:
SUBWFB REG, 1, 0
Before Instruction
REG =
W
=
C
=
After Instruction
REG =
0x03
0x0E
0x01
0xF5
W
= 0x0E
C
= 0x00
Z
= 0x00
N
= 0x01
(0000 0011)
(0000 1101)
(1111 0100)
; [2’s comp]
(0000 1101)
; result is negative
SWAPF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Q1
Decode
Swap f
[ label ] SWAPF f [,d [,a]]
0 ≤ f ≤ 255
d ∈ [0,1]
a ∈ [0,1]
(f<3:0>) → dest<7:4>,
(f<7:4>) → dest<3:0>
None
0011 10da ffff ffff
The upper and lower nibbles of register
‘f’ are exchanged. If ‘d’ is ‘0’, the result
is placed in W. If ‘d’ is ‘1’, the result is
placed in register ‘f’ (default). If ‘a’ is ‘0’,
the Access Bank will be selected,
overriding the BSR value. If ‘a’ is ‘1’,
then the bank will be selected as per
the BSR value (default).
1
1
Q2
Read
register ‘f’
Q3
Process
Data
Q4
Write to
destination
Example:
SWAPF REG
Before Instruction
REG =
After Instruction
REG =
0x53
0x35
DS41159D-page 318
 2004 Microchip Technology Inc.