TDA5230 Datasheet, PDF (93/186 Pages) Infineon Technologies AG – Universal Low Power ASK/FSK Single Conversion Multi-Channel Image-Reject Receiver

TDA523x
Functional Description
Dual: AFSKDEMBW0 and BFSKDEMBW0: FSK Demodulator Sensitivity
ADDR: 0x7D and 0x9D
Bit R/W Description
7:4 W not used
3:0 W DAMDLY: FSK Demodulator Sensitivity
use 0100b
Reset Value: 0x00
Dual: AFSKDEMBW1 and BFSKDEMBW1: FSK DAM Output Decimation
ADDR: 0x7E and 0x9E
Bit R/W Description
7:0 W DAMDEC: FSK DAM Decimation
Reset Value: 0x00
Dual: AFSKDEMBW2 and BFSKDEMBW2: FSK DAM Output Scaling
ADDR: 0x7F and 0x9F
Bit R/W Description
3:0 W DAMSCA: FSK DAM Output Scaling
Reset Value: 0x00
Noise Detector:
To decide whether there is a data signal or simply noise at the output of the demodulator,
there is a noise detector implemented. The principle is based on a power measurement
of the demodulated signal. The current noise power is stored in the FSKNP register and
is updated at every SPI controller access.
The Noise Detector is useful if data signal is transmitted with small FSK deviations.
Further information about the use of the Noise Detector is found in Chapter 2.4.9.2 Data
Filter and Signal Detection.
2.4.11 Clock Recovery
The Clock Recovery uses the peak from the matched filter as reference and generates
the recovered clock. The second main functionality is the generation of the symbol
synchronization found indication. This generally happens within the first 4 bits.
Data Sheet
89
Version 4.0, 2007-06-01