TDA5230 Datasheet, PDF (31/186 Pages) Infineon Technologies AG – Universal Low Power ASK/FSK Single Conversion Multi-Channel Image-Reject Receiver

TDA523x
Functional Description
CLKOUT0: Clock Divider Register 0
ADDR: 0x13
Bit R/W Description
7:0 W CLKOUT0: Clock Out Divider: Bit 7...Bit 0 (LSB)
Min: 0 00 01h = Clock divided by 2
Max: 0 00 00h = Clock divided by (2^20)*2
Reset Value: 0x07
CLKOUT1: Clock Divider Register 1
ADDR: 0x14
Bit R/W Description
7:0 W CLKOUT1: Clock Out Divider: Bit 15...Bit 8
Min: 0 00 01h = Clock divided by 2
Max: 0 00 00h = Clock divided by (2^20)*2
Reset Value: 0x00
CLKOUT2: Clock Divider Register 2
ADDR: 0x15
Reset Value: 0x00
Bit R/W Description
3:0 W CLKOUT2: Clock Out Divider: Bit 19 (MSB)...Bit 16
Min: 0 00 01h = Clock divided by 2
Max: 0 00 00h = Clock divided by (2^20)*2
Data Sheet
27
Version 4.0, 2007-06-01