TDA5230 Datasheet, PDF (144/186 Pages) Infineon Technologies AG – Universal Low Power ASK/FSK Single Conversion Multi-Channel Image-Reject Receiver

TDA523x
Register Descriptions
SPMOFFT1: Self Polling Mode Off Time Register 1
ADDR: 0x0A
Reset Value: 0x00
Bit R/W Description
5:0 W SPMOFFT: Set Value Self Polling Mode Off Time: Bit 13(MSB)...Bit 8
Off-Tim = T_RT *SPMOFFT
Min: 0001h = 1*T_RT
Reg.Value 3FFFh = 16383*T_RT
Max: 0000h = 16384*T_RT
SPMAP: Self Polling Mode Active Periods Reg.
ADDR: 0x0B
Reset Value: 0x01
Bit R/W Description
4:0 W SPMAP: Set Value Self Polling Mode Active Periods.
Min: 01h = 1 (Master) Period
Max: 1Fh = 31 (Master) Periods
Reg.Value 00h = 256 (Master) Periods
SPMIP: Self Polling Mode Idle Periods Register
ADDR: 0x0C
Bit R/W Description
7:0 W SPMIP: Set Value Self Polling Mode Idle Periods.
Min: 01h = 1 (Master) Period
Max: 00h = 256 (Master) Periods
Reset Value: 0x01
SN0: Serial Number Register 0
ADDR: 0x0E
Bit R/W Description
7:0 R SN: Serial Number: Bit 7...Bit 0(LSB)
Reset Value: SN
SN1: Serial Number Register 1
ADDR: 0x0F
Bit R/W Description
7:0 R SN: Serial Number: Bit 15...Bit 8
Reset Value: SN
Data Sheet
140
Version 4.0, 2007-06-01