TDA5230 Datasheet, PDF (20/186 Pages) Infineon Technologies AG – Universal Low Power ASK/FSK Single Conversion Multi-Channel Image-Reject Receiver

TDA523x
2.3
Functional Block Diagram
Functional Description
RFIN+
RFIN-
P-ON
VDD5V
VDDD
VDDD1V5
GNDD
VDDA
GNDA
GNDRF
10.7 MHz
Ceramic-Filter
IF-OUT
10.7 MHz
Ceramic-Filter
LIM-IN+ LIM-IN-
RSSI
LNA
IR-Mixer
IQ
IF-
Driver-
Amp.
VCO
I/Q-
Divider
PLL-Divider
Loop-
Filter
Charge- Phase- Reference-
Pump Detector Divider
Voltage-
Regulator
5V → 3.3V
Voltage-
Regulator
5V → 3.3V
Voltage-
Regulator
3.3V → 1.5V
Power-Up Brownout-
Reset Detector
IF-Limiter
RSSI-Generation
Polling-Timer Unit
Master Control Unit
A
D
Digital FSK-Demodulator
ASK
DIGITAL-RECEIVER
RSSI-Peak-Detectors &
Signal-MUX
FSK
Matched Data-Filter &
Offset-Cancellation
Sync
Chip-Data
Data-Clock Recovery &
Code-Violation Detector
Data-Slicer
ID
WU
FSync
EOM
Data
Framer &
Manchester-Decoder
Low-Power
Crystal-Oscillator
Trimming
f_sys
Clock-
Generation-
Unit
f_CLKOUT
Transparent-Mode Unit
ID-
Scanner
Wakeup
Detector
XTAL1
XTAL2 CLKOUT/RXD NINT/NSTR RX-RUN/RXD
FIFO
SFR
SPI-Interface
Serial-
Number
NCS SCK
SDI SDO
Figure 8 Functional Block Diagram
2.4
Functional Block Description
The RF frontend of the chip contains an LNA followed by an Image Reject Mixer that
converts the incoming RF-signal down to IF with adjustable gain from RFIN to IF-OUT.
Channel selection is achieved by up to two external ceramic IF filters, which narrow the
channel bandwidth. The multistage amplifier performs the limitation of the IF signal and
generation of the RSSI signal. The limited IF signal at its output drives the input of the
digital FSK Demodulator. The gain and offset of the generated RSSI signal can be
digitally adjusted. An A/D converter acts as an interface from the analog RSSI signal
path to the Digital Receiver.
The Digital Receiver performs data filtering, offset cancellation and Manchester
decoding of the received signals after they are demodulated. The chip also offers a
Data Sheet
16
Version 4.0, 2007-06-01