TDA5230 Datasheet, PDF (81/186 Pages) Infineon Technologies AG – Universal Low Power ASK/FSK Single Conversion Multi-Channel Image-Reject Receiver

TDA523x
Functional Description
Based on the recommended value of 3.5 bits for the RUNIN, the recommended setting
for SYSRTC0 = 0x87. This value is automatically used by the IAF TDA523x
Configuration Tool!
Dual: ASYSRCT0 & BSYSRCT0: Synchronization search time out
ADDR: 0x76 & 0x96
Bit R/W Description
7:0 W SYNCTO: Synchronization search time out¹⁾
FFh: 15 15/16 bit
00h: 0 bit
1) the value should be set in T/16 steps
Reset Value: 0x00
A Second important system parameter which must be considered, is the minimal Inter-
Frame Time (time in between two data frames). This time is equal to the T₂ time and has
a length of 2 bits. The EOM to PLL re-synchronization time is negligible (this time is T/16
bit), and the system delay T₁ is irrelevant, because of the EOM signal is used for PLL re-
synchronization only.
Note that the described Inter-Frame Time is based on the input pattern with equal signal
power in the following telegram, in other cases the Inter-Frame Time can vary from the
calculated value.
2.4.9.2 Data Filter and Signal Detection
The Digital Receiver processes input signals from the digital FSK Demodulator as well
as from the A/D-converted output signal of the RSSI generator used for ASK modulated
data signals. Input selection of the Digital Receiver is done by a multiplexer, which is
controlled by the Master Control Unit via the control signal Modulation Type. An optional
Pre-Slicer Unit may be activated in certain ASK applications to further increase the
jammer performance of the receiver.
Data Sheet
77
Version 4.0, 2007-06-01