TDA5230 Datasheet, PDF (100/186 Pages) Infineon Technologies AG – Universal Low Power ASK/FSK Single Conversion Multi-Channel Image-Reject Receiver

TDA523x
Functional Description
Reset
Init Wakeup Unit
SSync Search Time Elapsed =1
Idle
WU=0
No WU=0
SSync=0
SSync=1
Wakeup Criteria=Pattern Detection
SSync=1
Wakeup Criteria=Random Bits Detection
SSync=1
Wakeup Criteria=Equal Bits Detection
SSync=0
Pattern Detection
WU=0
No WU=0
WUW Chip Counter < WUBCNT
WUW Chip Counter < WUBCNT
RandomBits Detection
WU=0
No WU=0
WUW Chip Counter<WUBCNT
Equal Bits
Detection
WU=0
No WU=0
SSync=0
CV=1
Bit Change Detected=1
WUW Chip Counter elapsed
(WUW Chip Counter = WUBCNT)
Pattern Match=1
SSync=0
CV=1
WUW Chip Counter elapsed
(WUW Chip Counter = WUBCNT)
Wake-Up
WU=1
No WU=0
WUW Chip Counter elapsed
(WUW Chip Counter = WUBCNT)
SSync=1
Wakeup Criteria=Valid Data Rate Detection
Figure 47
No Wake-Up
WU=0
No WU=1
Wake Up Criteria Search
Dual: AWUC and BWUC: Conf.A Wake up Control Register
ADDR: 0x25 and 0x46
Reset Value:0x00
Bit R/W Description
1:0 W WUCRT: Wake Up Criteria
00b: Pattern Detection
01b: Random Bits
10b: Equal Bits
11b: Wake Up on Symbol Sync, Valid Data Rate; The WUBCNT Register
has no meaning in this mode.
Dual: AWUPAT0 and BWUPAT0: Conf.A Wake Up Detection Pattern0
ADDR: 0x26 and 0x47
Reset Value:0x00
Bit R/W Description
7:0 W WUPAT0: Wake Up Detection Pattern: Bit 7...Bit 0(LSB) (in Chips)
Data Sheet
96
Version 4.0, 2007-06-01