TDA5230 Datasheet, PDF (30/186 Pages) Infineon Technologies AG – Universal Low Power ASK/FSK Single Conversion Multi-Channel Image-Reject Receiver

TDA523x
Functional Description
f_CLKOUT = _2-----â‹---d----i-v---i-s-f--^s_i--o-^y--n^s-----f--a---c---t--o---r
Enable
Enable
f_sys
20 Bit Counter
2 x f_CLKOUT
Divide
by 2
f_CLKOUT
Figure 15 External Clock Generation Unit
The maximum CLKOUT frequency is limited by the driver capability of the CLKOUT/RXD
pin and depends on the external load connected to this pin. Please be aware that large
loads and/or high clock frequencies at this pin may interfere with the receiver and reduce
performance.
After Reset the CLKOUT/RXD pin is activated and the division factor initialized to 7
(equals 1 MHz for f_sys of 14 MHz).
A higher clock output frequency than 1 MHz is not recommended.
CMC0: Chip Mode Control Register 0
ADDR: 0x02
Bit R/W Description
6 W CLKOUTEN: CLKOUT enable
0: Disable
1: Enable programmable clock output
Reset Value: 0x40
Data Sheet
26
Version 4.0, 2007-06-01