TDA5230 Datasheet, PDF (111/186 Pages) Infineon Technologies AG – Universal Low Power ASK/FSK Single Conversion Multi-Channel Image-Reject Receiver

TDA523x
Functional Description
RunIn
TSIA
TSIGAP=10 chips ^GapSync
TSIB
Incoming Pattern[bits] ... 0 0 1 0 S _ _ _ _ _ 0 0 0 0 1 0 0 0 1 1 1 1 1
TSIBstart
123456789012345678901234567890123456
Start of TSIB
comparison
Stop of TSIB
comparison
Figure 55 TSIGap TSIB Timing
The next figure shows the TVWIN and TSIGAP dependency.
TVWIN
CV
TVWIN
TSIA
int.
delay
GAP
TVWIN
RUNIN/
TSIGRSYN = 1
TVWIN without GAP
TVWIN with GAP
Figure 56 TVWIN and TSIGAP dependency example
TVWIN calculation for pattern without GAP time:
TVWIN = round((8 + 16 ⋅ CV + 8) ⋅ 1,25)
The entire TVWIN time is made up of the CV¹⁾ number itself, the half bit before CV and
the half bit after the CV. To reach all frequency and duty cycle errors, 25% of the overall
sum must be added.
TVWIN calculation with GAP time:
1) CV...number of bits containing manchester code violations
Data Sheet
107
Version 4.0, 2007-06-01