TDA5230 Datasheet, PDF (131/186 Pages) Infineon Technologies AG – Universal Low Power ASK/FSK Single Conversion Multi-Channel Image-Reject Receiver

SN3: Serial Number Register3
ADDR: 0x11
Bit R/W Description
7:0 R SN: Serial Number: Bit 31 (MSB)...Bit 24
TDA523x
Functional Description
Reset Value: SN
2.4.20 Digital Input/Output Pins
As long as the pin P_ON is high, all digital output pins operate as described. If the pin
P_ON is low, all digital output pins are switched to a high output impedance mode.
Interfacing to 3.3V Logic:
The TDA523x is able to interface directly to any 3.3 V logic, in 3.3 V operation mode as
well as in 5 V operation mode.
Interfacing to 5V Logic:
in 5 V operation mode, all digital inputs are 5 V tolerant and can be directly connected to
5 V logic outputs. The digital outputs are able to deliver minimal 2.6 V output voltage at
500µA load current. This output level fits to TTL compatible CMOS logic inputs (e.g.
74HCTxxx). If a higher output voltage level is required, levelshifters have to be used.
EMC Reduction of Digital IO’s:
Because EMC noise generated by the digital signals may influence the receiver
sensitivity, it is recommended that all inputs are filtered by adding an RC circuit such as
in the Evaluation Board using 10 pF and 100 Ω.
Data Sheet
127
Version 4.0, 2007-06-01