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TDA5230 Datasheet, PDF (42/186 Pages) Infineon Technologies AG – Universal Low Power ASK/FSK Single Conversion Multi-Channel Image-Reject Receiver
TDA523x
Functional Description
2.4.5.3 HOLD Mode
This state (item 12 in the state diagram Figure 17 ) is used for fast reconfiguration of the
chip in Slave-Mode. This state can be reached after the Startup Sequencer and
Initialization of the chip has been finished from any state from 3 to 11. To reconfigure the
chip the SFR control bit HOLD must be set. After reconfiguration in this state the SFR
control bit HOLD has to be cleared again. After leaving the HOLD state, the INIT state is
entered and the receiver loads the new settings. Be aware that the time between
changing the configuration and reinitialization of the chip must be at least 40 µs. Take
note that one SPI command for clearing the SFR control bit needs 24 bits or 20 µs at the
highest SPI data rate. The remaining 20 µs must be guaranteed by the application.
FSM State
EOM-Check
Instruction Address Data Instruction Address
SPI Command Write
CMC1 HOLD=1 Write RFPLL1
0x02
0x03
0x40
0x02
0x22
Data
0x55
HOLD
INIT
Instruction Address
Write
CMC1
0x02
0x03
Data
HOLD=0
0x00
20us @ 1.2MHz
40us
Wait till
SSync
Figure 19 Hold State Behavior
HOLD Mode should only be entered from Run Mode Slave. Configuration changes in
Self Polling Mode should be done by switching to SLEEP Mode and returning to Self
Polling Mode after reconfiguration
CMC1: Chip Mode Control Register 1
ADDR: 0x03
Reset Value: 0x00
Bit R/W Description
6 W HOLD: Holds the chip in the config state (only in Run Mode Slave)
0: Normal Operation
1: Jump into the config state Hold
.
2.4.5.4 SLEEP Mode
The SLEEP Mode is a power save mode. The complete RF part is switched off and the
oscillator is in Low Precision Mode. Like in HOLD mode, the chip can be reconfigured.
When switching from SLEEP to Run Mode Slave, the state machine starts with the
internal Start Up Sequence.
Data Sheet
38
Version 4.0, 2007-06-01