TDA5230 Datasheet, PDF (71/186 Pages) Infineon Technologies AG – Universal Low Power ASK/FSK Single Conversion Multi-Channel Image-Reject Receiver

TDA523x
Functional Description
The RSSI signal is used to determine the relative RF input signal power of a received
signal or data transmission, and for example, to estimate the transmitter distance.
RSSI can be read either from the analog output as described below, or digitally via the
peak detector registers, which are described in Chapter 2.4.8.3 RSSI Peak Detector.
To achieve a well-defined RSSI response, the offset and the gain of the RSSI generation
unit can be trimmed via the SFR control bits LIMGAIN and LIMOFFS as described later.
The bandwidth of the RSSI signal can be adapted to the data rate. It is controlled by the
SFR control bits AAFILT.
This RSSI Signal can be fed to the pin RSSI via a buffer amplifier. To enable this buffer
the SFR control bit RSSIMONE must be set.
IFBUF-IN
IFBUF-OUT LIM-IN+
IF-
Buffer-
Amp.
1
LIM-IN-
IF-LIMITER
RSSI-Generation
5
4
RSSI
MUX
RSSIMONE
RSSIMTR
A
D
To digital
FSK-Demodulator
and digital BB-
Processing
2
Figure 32 IF Path, RSSI
RSSI is derived from four signals. Any of these four signals (RSSI+, RSSI-, REF+ and
REF-) may be routed to the pin RSSI. RSSI+ is the real RSSI signal derived from the
input signal voltage, while RSSI- is an internal offset, and REF+/- is the internal voltage
reference. The selection of the signal routed to pin RSSI is done by the SFR control bits
RSSIMTR.
Typical values are:
RSSI-...1.55 V, REF+...1.8 V, REF-...1.3 V; these values are not influenced by trimming.
The following figure shows the behavior of RSSI+ over an input signal power sweep. The
four curves show the trimming range in between minimum offset/maximum gain and
maximum offset/minimum gain, the typical RSSI+ using recommended default setting of
minimum offset / minimum gain (if RSSI trimming is not used), and the fourth curve
represents a typical trimmed RSSI+
Data Sheet
67
Version 4.0, 2007-06-01