TDA5230 Datasheet, PDF (22/186 Pages) Infineon Technologies AG – Universal Low Power ASK/FSK Single Conversion Multi-Channel Image-Reject Receiver

TDA523x
Functional Description
2.4.1 Power Supply
The chip may be operated within a 5 V or a 3.3 V environment.
VDDA
IN
Voltage Regulator
5 → 3.3 V
OUT
RX-RUN
IN
Voltage Regulator
5 → 3.3 V
OUT
VDD5V
VDDD
Analog
Section
RF
Section
IN
Voltage Regulator
3.3 → 1.5 V
OUT
Digital-I/O
GNDA
GNDRF
P_ON
Power-Up
Brownout
Detector
Reset- Internal
Circuit Reset
Digital-Core
VDDD1V5
GNDD
Figure 10 Power Supply
For operation within a 5 V environment, the chip is supplied via the pin VDD5V. In this
configuration a 5 to 3.3 V voltage regulator supplies the analog/RF-section (only active
in Run Modes) and a second 5 to 3.3 V voltage regulator supplies the digital I/O-pads.
When operating within a 3.3 V environment, the pins VDD5V, VDDA and VDDD must be
supplied. The 5 to 3.3 V voltage regulators are inactive in this configuration.
The internal digital core is supplied by an additional 3.3 to 1.5 V regulator.
The regulators for the digital section are controlled by the signal at the P_ON (Power
On). A low signal at P_ON disables all regulators and sets the IC into Power Down Mode.
A low to high transition at P_ON enables the regulators for the digital section and initiates
a power on reset. The regulator for the analog section is controlled by the Master Control
Unit and is active only when the RF-section is active (RX-RUN = high).
P_ON can be used to initiate a reset. The required negative pulse time t_{P_ON} is specified
in Chapter 4 Specifications.
Data Sheet
18
Version 4.0, 2007-06-01