TDA5230 Datasheet, PDF (153/186 Pages) Infineon Technologies AG – Universal Low Power ASK/FSK Single Conversion Multi-Channel Image-Reject Receiver

TDA523x
Register Descriptions
XTALCAL1: Trim XTAL frequency, fine
ADDR: 0x62
Reset Value: 0x00
Bit R/W Description
3 W XTAL_SW_FINE_3: Connect trim capacitor: 500 fF
2 W XTAL_SW_FINE_2: Connect trim capacitor: 250 fF
1 W XTAL_SW_FINE_1: Connect trim capacitor: 125 fF
0 W XTAL_SW_FINE_0: Connect trim capacitor: 62.5 fF
TOTIM: Time Out Timer Register
ADDR: 0x6B
Reset Value: 0xFF
Bit R/W Description
7:0 W TO_TIMER: Set value time out timer
Timer is used to return from Run Mode Self Polling to the Self Polling Mode
whenever there is no Symbol Synchronization. Timer is set back after EOM.
TOTIM must be enabled in the CMC0 register.
TimeOut= (TOTIM * 64 * 512) / fsys
Min: 01h = (1 * 64 *512)/ fsys
Max: 00h= (256 * 64 * 512) / fsys
Dual: ADIGRXC and BDIGRXC: Global Settings
ADDR: 0x6C and 0x8C
Reset Value: 0x00
Bit R/W Description
2:1 W AAFILT: Anti Aliasing Filter
00b: 40kHz (default)
01b: 13.6kHz
10b: 5kHz
11b: 3.6kHz
The anti-aliasing filter corner frequency can be changed to achieve better
performance. Note that the corner frequency and the data rate must be set
together.
0 W DATINV
0: default
1: Invert data polarity
Data Sheet
149
Version 4.0, 2007-06-01