TDA5230 Datasheet, PDF (146/186 Pages) Infineon Technologies AG – Universal Low Power ASK/FSK Single Conversion Multi-Channel Image-Reject Receiver

TDA523x
Register Descriptions
CLKOUT2: Clock Divider Register2
ADDR: 0x15
Reset Value: 0x00
Bit R/W Description
3:0 W CLKOUT2: Clock Out Divider: Bit 19 (MSB)...Bit 16
Min: 0 00 01h = Clock divided by 2
Max: 0 00 00h = Clock divided by (2^20)*2
LOC: Local Oscillator Control Register
ADDR: 0x16
Reset Value: 0x00
Bit R/W Description
7:5 W Always set to 0
4 W SSBSEL: Local Oscillator Injection Mode Selection
0: Lo-Side LO Injection..use for TDA5230
1: Hi-Side LO Injection..use for TDA5231
3:0 W Always set to 0
LIMC0: Trim RSSI Gain
ADDR: 0x1B
Bit R/W Description
4:0 W LIMGAIN: Trim the RSSI Gain (Slope)
Min: 00h = Minimum gain
Max: 1Fh = Maximum gain
Reset Value: 0x0C
LIMC1: Trim RSSI Offset, enable RSSI pin
ADDR: 0x1C
Bit R/W Description
6:5 W RSSIMTR: Select signal for RSSI pin
00b: RSSI+
01b: RSSI- (reference)
10b: REF+ (reference)
11b: REF- (reference)
Reset Value: 0x15
Data Sheet
142
Version 4.0, 2007-06-01