TDA5230 Datasheet, PDF (168/186 Pages) Infineon Technologies AG – Universal Low Power ASK/FSK Single Conversion Multi-Channel Image-Reject Receiver

TDA523x
Specifications
#
Parameter
Symbol
B.5 Supply current in Power Down I_VDDpdwn
Mode
T_amb = 25 °C
T_amb = 85 °C
T_amb = 105 °C
B.6 Supply current in Power Down I_VDDpdwn
Mode
T_amb = 25 °C
T_amb = 85 °C
T_amb = 105 °C
B.7 Supply current of IF buffer- I_buff
amplifier
B.8 Supply current of clock
generation unit
I_VDDclock
B.9 Receiver reset time
B.10 Brownout threshold
B.11 Receiver startup time
t_Reset
V_BOR
t_RXstartup
B.12 Channel Hop Latency Time
and
t_CHHOP
Configuration Change Latency
Time (Configuration A to B)
B.13 RF-Frontend startup delay
B.14 Interrupt duration
B 15 P_ON minimal pulse width
t_RFstartdelay
t_INT
t_{P_ON}
B 16 _{Minimal TMasterPeriod}
T_MasterPeriod
Limit Values
min. typ. max.
0.6 1.5
3
12
6
25
Unit
µA
µA
µA
Test Conditions *
VDD5V = VDDA =
VDDD = 3.6 V
VDD5V = 5.5 V
0.8
1.5
µA
2.5 10
µA
5
20
µA
0.5
0.7
mA
P_in < -50 dBm
20
25
µA
f_CLKOUT =1 kHz
C_Load =10 pF
0,8
5
ms
2,45
V
119 Note 1 119 64*T_sys Time to startup ∗
Note 2 RF-Frontend
(comprises time
required to switch
crystal oscillator
from low power to
high precision
mode)
12
Note 1 12
64*T_sys Time to switch
*
RF-PLL between
different RF-
Channels. (does
not include settling
of the data clock
recovery.)
72
Note 1 72
64*T_sys Delay of startup of *
RF-Frontend
1
Note 1 1
64*T_sys Pulse width of
*
Note 3
interrupt
100
µs
Minimum pulse *
width to reset the
chip
5
Note 4
ms
Minimal
*
Masterperiod for
stable operation
RF Characteristics
C.1 TDA5230
RF-PLL
Operational frequency band 1 f_band1
Operational frequency band 2 f_band2
Data Sheet
433
865
164
Lo-Side
LO Injection
450 MHz
870 MHz
Version 4.0, 2007-06-01