TDA5230 Datasheet, PDF (125/186 Pages) Infineon Technologies AG – Universal Low Power ASK/FSK Single Conversion Multi-Channel Image-Reject Receiver

TDA523x
Functional Description
RESET
CMC1/NINTNSTRSEL
CMC1/NINTPOL
SPI READ IS
IS X FF 01 03 07
0F
NINT/NSTR
WU(A,B)
FSYNC(A,B)
MID(A,B)
EOM(A,B)
ConfigA
Figure 65 Interrupt Generation Waveform
1C 30 70 F0 00
ConfigB
Known Problem on using EOM Interrupt in combination with FIFO Lock in Run
Mode Slave:
In difference to the described behavior in Run Mode Slave NINT sticks low for low active
Interrupt or high for high active interrupt, after an EOM Interrupt, if FIFO Lock is enabled.
NINT is reset after reading the FIFO. See also Chapter 2.4.15 Data FIFO.
CMC1: Chip Mode Control Register 1
ADDR: 0x03
Reset Value: 0x00
Bit R/W Description
5 W NINTPOL: Invert NINT Polarity
0: The Interrupt is active low
1: The polarity of the Interrupt is inverted (active high)
1 W NINTNSTRSEL: NINT/NSTR Pin Function
0: Interrupt out at pin NINT/NSTR
1: RX-Data Strobe out NINT/NSTR
Data Sheet
121
Version 4.0, 2007-06-01